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From:   Ran Wang <ran.wang_1@nxp.com>
To:     Felipe Balbi <balbi@kernel.org>
CC:     Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        "linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 2/2] usb: dwc3: Add workaround for host mode VBUS glitch
 when boot
Thread-Topic: [PATCH 2/2] usb: dwc3: Add workaround for host mode VBUS glitch
 when boot
Thread-Index: AQHUrWdx3CIJLXThzk+kTWUVQ+nAh6Wx3xQAgC7U+7A=
Date:   Fri, 15 Feb 2019 08:39:19 +0000
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 <201901162139.dkm3lJv5%fengguang.wu@intel.com>
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Hi Felipe,

    Sorry for the late response, I didn't receive your mail.

Felipe Balbi <balbi@kernel.org> wrotes:
>Hi,
>
>Ran Wang <ran.wang_1@nxp.com> writes:
>> +static void dwc3_power_off_all_roothub_ports(struct dwc3 *dwc)
>> +{
>> +	int i, port_num;
>> +	u32 reg, op_regs_base, offset;
>> +	void __iomem		*xhci_regs;
>> +
>> +	/* xhci regs is not mapped yet, do it temperary here */
>> +	if (dwc->xhci_resources[0].start) {
>> +		xhci_regs =3D ioremap(dwc->xhci_resources[0].start,
>> +				DWC3_XHCI_REGS_END);
>> +		if (IS_ERR(xhci_regs)) {
>> +			dev_err(dwc->dev, "Failed to ioremap xhci_regs\n");
>> +			return;
>> +		}
>> +
>> +		op_regs_base =3D HC_LENGTH(readl(xhci_regs));
>> +		reg =3D readl(xhci_regs + XHCI_HCSPARAMS1);
>> +		port_num =3D HCS_MAX_PORTS(reg);
>> +
>> +		for (i =3D 1; i <=3D port_num; i++) {
>> +			offset =3D op_regs_base + XHCI_PORTSC_BASE + 0x10*(i-1);
>> +			reg =3D readl(xhci_regs + offset);
>> +			reg &=3D ~PORT_POWER;
>> +			writel(reg, xhci_regs + offset);
>> +		}
>> +
>> +		iounmap(xhci_regs);
>
>why can't this be done during xhci_gen_setup()?

Actually I have done experiment like what you suggested (in xhci-plat.c), b=
ut the timing
seems too late--making VBUS waveform look like a square wave as below:

              Here DWC3 enable host mode, VBUS on
              |
+5V          /---------\ 40ms  /---------------------------....
0V  ________/   90ms   \______/
                       |      |          =20
                       |      Here do xhci reset, VBUS back to +5V again
                       Here set all PORTSC[PP] to 0 in xhci_gen_setup()

So I am afraid the solution might have to be added in DWC3 core driver wher=
e just after host mode enabling code if want fix this :(

Regards,
Ran