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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: sYavKm3EnElS9JWUfsrN2gieQpdn0mUlQUDe7rQMmdPTTffVkVhmzPWprCMVtvMNouMnu9zxz3EtyDqB0kpXoiip32eyCGd1q5d2788cvhOeCTuyRQQNfcwYxtGLlFcNN4KNYDTj1OJtxEw3qRTM4iRbgRkpoR03nDt5Cj25KlmkdI92aDzanYjPdV7CrulqZCekuXEqBFwTi7uxJl2vsABTl2lUs3DzahTEkYy5W8D9I9wh9xcqzkzkzGh7jXCrvkDOIORAwlDQiitONrdW4GvgUMFaV9ffH6RTdR/I4RABf5MAZIO+uMMcGIiB5M5mP2e/m/EiiYzRJhgnao7s0LrE2tsDGiDB3Lmc46C8pE4Q2KGZT6NEG5UUxckzsxztUxZNMN+Fy7rsTeQePp9tRDDrwd0MAJMGHCQKaTLNx/g= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: f86e0e67-8488-42c4-6deb-08d6938228b0 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Feb 2019 20:14:15.4013 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1582 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org REG_32BIT_ZERO_EX and REG_64BIT are always handled in exactly the same way, and reg_val_propagate_range() never actually sets any register to type REG_32BIT_ZERO_EX. Remove the redundant & unused REG_32BIT_ZERO_EX. Signed-off-by: Paul Burton --- arch/mips/net/ebpf_jit.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/arch/mips/net/ebpf_jit.c b/arch/mips/net/ebpf_jit.c index 715415fa2345..76e9bf88d3b9 100644 --- a/arch/mips/net/ebpf_jit.c +++ b/arch/mips/net/ebpf_jit.c @@ -79,8 +79,6 @@ enum reg_val_type { REG_64BIT_32BIT, /* 32-bit compatible, need truncation for 64-bit ops. */ REG_32BIT, - /* 32-bit zero extended. */ - REG_32BIT_ZERO_EX, /* 32-bit no sign/zero extension needed. */ REG_32BIT_POS }; @@ -349,7 +347,7 @@ static int build_int_epilogue(struct jit_ctx *ctx, int = dest_reg) if (dest_reg =3D=3D MIPS_R_RA) { /* Don't let zero extended value escape. */ td =3D get_reg_val_type(ctx, prog->len, BPF_REG_0); - if (td =3D=3D REG_64BIT || td =3D=3D REG_32BIT_ZERO_EX) + if (td =3D=3D REG_64BIT) emit_instr(ctx, sll, r0, r0, 0); } =20 @@ -695,7 +693,7 @@ static int build_one_insn(const struct bpf_insn *insn, = struct jit_ctx *ctx, if (dst < 0) return dst; td =3D get_reg_val_type(ctx, this_idx, insn->dst_reg); - if (td =3D=3D REG_64BIT || td =3D=3D REG_32BIT_ZERO_EX) { + if (td =3D=3D REG_64BIT) { /* sign extend */ emit_instr(ctx, sll, dst, dst, 0); } @@ -710,7 +708,7 @@ static int build_one_insn(const struct bpf_insn *insn, = struct jit_ctx *ctx, if (dst < 0) return dst; td =3D get_reg_val_type(ctx, this_idx, insn->dst_reg); - if (td =3D=3D REG_64BIT || td =3D=3D REG_32BIT_ZERO_EX) { + if (td =3D=3D REG_64BIT) { /* sign extend */ emit_instr(ctx, sll, dst, dst, 0); } @@ -724,7 +722,7 @@ static int build_one_insn(const struct bpf_insn *insn, = struct jit_ctx *ctx, if (dst < 0) return dst; td =3D get_reg_val_type(ctx, this_idx, insn->dst_reg); - if (td =3D=3D REG_64BIT || td =3D=3D REG_32BIT_ZERO_EX) + if (td =3D=3D REG_64BIT) /* sign extend */ emit_instr(ctx, sll, dst, dst, 0); if (insn->imm =3D=3D 1) { @@ -863,13 +861,13 @@ static int build_one_insn(const struct bpf_insn *insn= , struct jit_ctx *ctx, if (src < 0 || dst < 0) return -EINVAL; td =3D get_reg_val_type(ctx, this_idx, insn->dst_reg); - if (td =3D=3D REG_64BIT || td =3D=3D REG_32BIT_ZERO_EX) { + if (td =3D=3D REG_64BIT) { /* sign extend */ emit_instr(ctx, sll, dst, dst, 0); } did_move =3D false; ts =3D get_reg_val_type(ctx, this_idx, insn->src_reg); - if (ts =3D=3D REG_64BIT || ts =3D=3D REG_32BIT_ZERO_EX) { + if (ts =3D=3D REG_64BIT) { int tmp_reg =3D MIPS_R_AT; =20 if (bpf_op =3D=3D BPF_MOV) { @@ -1257,8 +1255,7 @@ static int build_one_insn(const struct bpf_insn *insn= , struct jit_ctx *ctx, if (insn->imm =3D=3D 64 && td =3D=3D REG_32BIT) emit_instr(ctx, dinsu, dst, MIPS_R_ZERO, 32, 32); =20 - if (insn->imm !=3D 64 && - (td =3D=3D REG_64BIT || td =3D=3D REG_32BIT_ZERO_EX)) { + if (insn->imm !=3D 64 && td =3D=3D REG_64BIT) { /* sign extend */ emit_instr(ctx, sll, dst, dst, 0); } --=20 2.20.1