Received: by 2002:ac0:946b:0:0:0:0:0 with SMTP id j40csp2462177imj; Mon, 18 Feb 2019 06:27:25 -0800 (PST) X-Google-Smtp-Source: AHgI3IYJ94up/jum+x0Lf+qJirFDegdRvmrLKuozi9CiwsEDy5dUeB4Y9TkEmakImQUnxf8C/Bck X-Received: by 2002:a17:902:f20a:: with SMTP id gn10mr25507161plb.105.1550500045766; Mon, 18 Feb 2019 06:27:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550500045; cv=none; d=google.com; s=arc-20160816; b=Z83HSlv3yOUB+xIn2WXV0SyvJT0VRkmlBthl1W2YaausFet8az0WH0qg1FYzCJLh6d Xa13UDDPu3wrHxnVt4njl4qNluqpeNcgg6K5oCwJWH2hJt+jJekaiPh5dPViQKNqF3Ak WJQENM66p1n98xUPiDPvzca4d3AX8ajyd7rcYz4bLoVPsClYUMBRS0QPz+OKGWKLwkzt KpS6Ycp8zVSIZwbvIYrsufXb6PeQUulFMw804dunmLiM0ZJvAxiBIzrz9sh4JbrnqALp bfgrI3lPhYGS89YlnQ5mVUk2+2m3hJm0e/W44MGz2bjJH5fA5+89BD1bbmlQIj9tW/mt xYVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dmarc-filter:dkim-signature:dkim-signature; bh=huj2z1QQGbeDA6E1Si8lkUC0xtaAO9EGk6S5oJ1g8Dk=; b=XeA2a5DeINpc4b5szum2N9ZvRzNp//gvml2ORoZRfp1mcvsfzY9aQHi6QEeoyYYPAw EoXe1deoFdiuTT58WJ3OL5l5TIseQJMP0tDX0h9O4FQvmgCfmo/6IOONAAZHc0QqxZrb UYXHgbuBzLOs957LJBqLFJ/mvu5bMZ+4lJrxxOHGIDKM9OiOHuo8RDkRZL6KOePhn/Ah RfiKvuzxnguCexeRWcfXMkvW/XR42Iab1x26GGDpCTK1YmGO/SYSXvp9u3sZBNWWgZMn a7ZCT6IwiRnN5JC2tXHW3WQW+gE3jEb2ObcxIk7hy27fwoaJtfHYN5PFww9cbsLQlHfd 8FNg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=gKxy9zlf; dkim=pass header.i=@codeaurora.org header.s=default header.b=hFQwBIfu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t20si13542180plo.360.2019.02.18.06.27.10; Mon, 18 Feb 2019 06:27:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=gKxy9zlf; dkim=pass header.i=@codeaurora.org header.s=default header.b=hFQwBIfu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731952AbfBRO01 (ORCPT + 99 others); Mon, 18 Feb 2019 09:26:27 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:42594 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388837AbfBROCf (ORCPT ); Mon, 18 Feb 2019 09:02:35 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id CE4FD6081B; Mon, 18 Feb 2019 14:02:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1550498554; bh=cnVsNXRes4uwSdAobsecjPPy5fAGYqoF5uh7AA9Hfd0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gKxy9zlfDzTqvebQC09naQg6TOp8yK+K88nx8Y5aTdQz+vW7ZpLeUSjh/kwSu727P Qcv5B9ScVCZj69XLP91Mu8b/Zj701IfVWrKXGsxljyyb/9ggQ4tHLM6MShT8jqL1ra y6pQkmaUhF1s8Tfb9ti7BLTgZ2UELzQ/Ni93R81s= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED,FROM_LOCAL_NOVOWEL autolearn=no autolearn_force=no version=3.4.0 Received: from rplsssn-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rplsssn@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E29F76081B; Mon, 18 Feb 2019 14:02:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1550498551; bh=cnVsNXRes4uwSdAobsecjPPy5fAGYqoF5uh7AA9Hfd0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hFQwBIfuszlbqryBatALeSrNFb8BraqVz1Gq9Z6yTd3dOtmEKwJNB+ajRROhd7DSk DhlQXfXenddL5KZtwDUWayQx0Gs92Rq4ri5bF8bL8obg+oPfRvzMwZnPmjIrkTpr8v CjD9zBpVkWsnxnyaqFJo6WVmG192f7ZTFXgKzoqk= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E29F76081B Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RESEND v1 1/2] drivers: qcom: rpmh-rsc: clear active mode configuration for wake TCS Date: Mon, 18 Feb 2019 19:32:09 +0530 Message-Id: <20190218140210.14631-2-rplsssn@codeaurora.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190218140210.14631-1-rplsssn@codeaurora.org> References: <20190218140210.14631-1-rplsssn@codeaurora.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org For RSCs that have sleep & wake TCS but no dedicated active TCS, wake TCS can be re-purposed to send active requests. Once the active requests are sent and response is received, the active mode configuration needs to be cleared so that controller can use wake TCS for sending wake requests. Signed-off-by: Raju P.L.S.S.S.N Reviewed-by: Matthias Kaehlcke --- drivers/soc/qcom/rpmh-rsc.c | 77 ++++++++++++++++++++++++++----------- 1 file changed, 54 insertions(+), 23 deletions(-) diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c index 75bd9a83aef0..6cc7f219ce48 100644 --- a/drivers/soc/qcom/rpmh-rsc.c +++ b/drivers/soc/qcom/rpmh-rsc.c @@ -201,6 +201,42 @@ static const struct tcs_request *get_req_from_tcs(struct rsc_drv *drv, return NULL; } +static void __tcs_trigger(struct rsc_drv *drv, int tcs_id, bool trigger) +{ + u32 enable; + + /* + * HW req: Clear the DRV_CONTROL and enable TCS again + * While clearing ensure that the AMC mode trigger is cleared + * and then the mode enable is cleared. + */ + enable = read_tcs_reg(drv, RSC_DRV_CONTROL, tcs_id, 0); + enable &= ~TCS_AMC_MODE_TRIGGER; + write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); + enable &= ~TCS_AMC_MODE_ENABLE; + write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); + + if (trigger) { + /* Enable the AMC mode on the TCS and then trigger the TCS */ + enable = TCS_AMC_MODE_ENABLE; + write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); + enable |= TCS_AMC_MODE_TRIGGER; + write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); + } +} + +static inline void enable_tcs_irq(struct rsc_drv *drv, int tcs_id, bool enable) +{ + u32 data; + + data = read_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0, 0); + if (enable) + data |= BIT(tcs_id); + else + data &= ~BIT(tcs_id); + write_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0, data); +} + /** * tcs_tx_done: TX Done interrupt handler */ @@ -237,6 +273,21 @@ static irqreturn_t tcs_tx_done(int irq, void *p) } trace_rpmh_tx_done(drv, i, req, err); + + /* + * if wake tcs was re-purposed for sending active + * votes, clear AMC trigger & enable modes and + * disable interrupt for this TCS + */ + if (!drv->tcs[ACTIVE_TCS].num_tcs) { + __tcs_trigger(drv, i, false); + /* + * Disable interrupt for this TCS to avoid being + * spammed with interrupts coming when the solver + * sends its wake votes. + */ + enable_tcs_irq(drv, i, false); + } skip: /* Reclaim the TCS */ write_tcs_reg(drv, RSC_DRV_CMD_ENABLE, i, 0); @@ -285,28 +336,6 @@ static void __tcs_buffer_write(struct rsc_drv *drv, int tcs_id, int cmd_id, write_tcs_reg(drv, RSC_DRV_CMD_ENABLE, tcs_id, cmd_enable); } -static void __tcs_trigger(struct rsc_drv *drv, int tcs_id) -{ - u32 enable; - - /* - * HW req: Clear the DRV_CONTROL and enable TCS again - * While clearing ensure that the AMC mode trigger is cleared - * and then the mode enable is cleared. - */ - enable = read_tcs_reg(drv, RSC_DRV_CONTROL, tcs_id, 0); - enable &= ~TCS_AMC_MODE_TRIGGER; - write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); - enable &= ~TCS_AMC_MODE_ENABLE; - write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); - - /* Enable the AMC mode on the TCS and then trigger the TCS */ - enable = TCS_AMC_MODE_ENABLE; - write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); - enable |= TCS_AMC_MODE_TRIGGER; - write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); -} - static int check_for_req_inflight(struct rsc_drv *drv, struct tcs_group *tcs, const struct tcs_request *msg) { @@ -377,10 +406,12 @@ static int tcs_write(struct rsc_drv *drv, const struct tcs_request *msg) tcs->req[tcs_id - tcs->offset] = msg; set_bit(tcs_id, drv->tcs_in_use); + if (msg->state == RPMH_ACTIVE_ONLY_STATE && tcs->type != ACTIVE_TCS) + enable_tcs_irq(drv, tcs_id, true); spin_unlock(&drv->lock); __tcs_buffer_write(drv, tcs_id, 0, msg); - __tcs_trigger(drv, tcs_id); + __tcs_trigger(drv, tcs_id, true); done_write: spin_unlock_irqrestore(&tcs->lock, flags); -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation.