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[209.132.180.67]) by mx.google.com with ESMTP id f1si12213791pfb.282.2019.02.18.10.34.06; Mon, 18 Feb 2019 10:34:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731209AbfBRPHz (ORCPT + 99 others); Mon, 18 Feb 2019 10:07:55 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:32974 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728954AbfBRPHy (ORCPT ); Mon, 18 Feb 2019 10:07:54 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 377B515AB; Mon, 18 Feb 2019 07:07:54 -0800 (PST) Received: from [10.1.196.50] (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AC51E3F675; Mon, 18 Feb 2019 07:07:52 -0800 (PST) Subject: Re: [RFC PATCH] arm64/fpsimd: Don't disable softirq when touching FPSIMD/SVE state To: Dave Martin , Sebastian Andrzej Siewior Cc: Ard Biesheuvel , linux-arm-kernel , linux-rt-users@vger.kernel.org, Catalin Marinas , Will Deacon , Linux Kernel Mailing List References: <20190208165513.8435-1-julien.grall@arm.com> <20190213143029.ad2kzg7vtuo3zpjk@linutronix.de> <20190213153630.GK3567@e103592.cambridge.arm.com> <20190213165227.7ekekkxazhbaqxoe@linutronix.de> <20190214103449.GN3567@e103592.cambridge.arm.com> From: Julien Grall Message-ID: <32ba7e1e-37ce-c904-15e4-9c908e873479@arm.com> Date: Mon, 18 Feb 2019 15:07:51 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: <20190214103449.GN3567@e103592.cambridge.arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 14/02/2019 10:34, Dave Martin wrote: > On Wed, Feb 13, 2019 at 05:52:27PM +0100, Sebastian Andrzej Siewior wrote: >> On 2019-02-13 16:40:00 [+0100], Ard Biesheuvel wrote: >>>>> This is equal what x86 is currently doing. The naming is slightly >>>>> different, there is irq_fpu_usable(). >>>> >>>> Yes, I think it's basically the same idea. >>>> >>>> It's been evolving a bit on both sides, but is quite similar now. >>>> >>> >>> may_use_simd() only exists because we have a generic crypto SIMD >>> helper, and so we needed something arch agnostic to wrap around >>> irq_fpu_usable() >> >> My question was more if this is helpful and we want to keep or if >> it would be better to remove it and always disable BH as part of SIMD >> operations. > > Wouldn't this arbitrarily increase softirq latency? Unconditionally > forbidding SIMD in softirq might make more sense. It depends on how > important the use cases are... Looking at the commit message from cb84d11e1625 "arm64: neon: Remove support for nested or hardirq kernel-mode NEON", one of the use case for crypto in softirq is certain mac80211 drivers. Is there any other use case for use crypto in softirqs? Cheers, -- Julien Grall