Received: by 2002:ac0:946b:0:0:0:0:0 with SMTP id j40csp2754469imj; Mon, 18 Feb 2019 11:33:56 -0800 (PST) X-Google-Smtp-Source: AHgI3IbzBAmS0gh7NTNXwr3Mf0csQU4VVVRV7s047kmIeWEizfbEkvwh7sLlLAn8sh/i3x9AG8Kk X-Received: by 2002:a65:62ce:: with SMTP id m14mr20473701pgv.101.1550518436696; Mon, 18 Feb 2019 11:33:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550518436; cv=none; d=google.com; s=arc-20160816; b=qLKVmFKOFp8MRCWgJuDbeRSiUPKYz/nZCLahCEfhoEVU4BGx+8bvkLrt+I+Yy2DM8Y EYvHjz+2Mo8xZA5gAC/wXTj2zyhjuX3wMEKNF0fKIsDvzMFXSXttvTJIeTZXkpGBTjup ZorMHo/dR+zxz5WEys8/+KDP4daCO4WXUyf5jXUawcr26F9Z8Ztuizm75s4EhNk9RMRJ xZEVlQVgHwghNrVHrmduvgg/1vkYU0o56cQ0gTdwV+9ZpHYa5v2rTYkMhnnZFt/A+CpL kH4hJT/pg712/FpB6wDEW2lU9ED7+2PdaQm/6ISBCM/4GnW0Cy5q9/x3MutzdwSmUSOg ZcPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=C4KXnKUbh4xVNl1Rhgd30L/K3+EBkbVzQxEQsOcy+8c=; b=yg/owoTM7zgWP4Dr0Ysq+jhQoWYZthoFCmyESqRR2U3gEKagKoa6sIC4koYyc+IuvC XeWofG35+ZPvu3SYPuWlci4vI2GEGyanhsIw9IcVQjioeQVBeZBbuc6ZzpB4tWyv3PmC xZ8CFpX2rViZup/+Uq8WppngthIdqcI9YUONgbIZNq/gLrLCysl8l1jn1pdcHMmN6w7q +6X+lT5LzFECdzOCChTp1zHXHNRfz2h23DIzZyZCfBar8jSPo/KG11HU+iYrZeEIRHrQ UPWvx7LP/qNMBNJMLqnOq97wdhTPHQI5jfumCN1H6ZWA/46wHW30UFTVS3H0BpxHS3o0 B62Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=dkbq+Lw2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r18si4975183pls.374.2019.02.18.11.33.40; Mon, 18 Feb 2019 11:33:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=dkbq+Lw2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728715AbfBRTMN (ORCPT + 99 others); Mon, 18 Feb 2019 14:12:13 -0500 Received: from mail-pf1-f195.google.com ([209.85.210.195]:36810 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728609AbfBRTMK (ORCPT ); Mon, 18 Feb 2019 14:12:10 -0500 Received: by mail-pf1-f195.google.com with SMTP id n22so9039536pfa.3; Mon, 18 Feb 2019 11:12:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=C4KXnKUbh4xVNl1Rhgd30L/K3+EBkbVzQxEQsOcy+8c=; b=dkbq+Lw2jeD6M0baOxWknoygE/6cUU4QJNOFZaAZ73kebR5gjOIaxCbb/L4fYZmIAv ltnZDZHvoPIJXDlvkJLx0iiiywj7M7ylasXcnSiiQBV4DA+nB2INkn2dCqfVOmjiBgtX QitR3MUDO+paamUtVxmafFJbCTKPCzQGDCqtWEe8DymZHBM1AxXdvVezwWQsO75GJNqe HXP6dBB0Ag4d92JbnUKE9YCflp67eAVilX9zxYfPKhNsux5dlyGy6ILvVLb8Ply1oZD1 E1JZmxTQssfUbB7qKisLrgEO0crEJaYxKCLR7oPmjZAQIGwHMiXIqLPWtaV3J6rioFUD 18BQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=C4KXnKUbh4xVNl1Rhgd30L/K3+EBkbVzQxEQsOcy+8c=; b=mmRqkMgJijOKvr8xOvmG/XqSeuVX0Gxk+l/ZiOQ5UJk08yV4ZCndZ/47mrEw3wS8X+ xA5rIXAqFADE3TPaiEuyhwHr9KaaZ5XEaQL8jpZjUE5fkKSvCHIJkrETYZtE3oTXpuip rd3OmWEAmBnFzvIY+wAtXNFpu30R/fNgf9zxwIESfuhcRe5HzOxgqJsZd7T85wiwzYgD oPTY4VESiD6Zi8cUn/z5SJcYOx8HEI36ONC/zFmzyzB8dqyJ5d+uLddZ7H/i5GRIrKrR rSUJuwddJarYYN2sbqa6e9hVWF/r84iL66o5z8YV18/uNrmMcCt8pRVzHcRDJcmbSECN cvDg== X-Gm-Message-State: AHQUAubub09dyJqayl+MfBGiqiNCxg7WDtBqMWYNeuAqnA7ps0kn1FgI ursBEV9pEwSaOAA8IHHIZwjvCpKF X-Received: by 2002:a63:bf4c:: with SMTP id i12mr20338185pgo.382.1550517128974; Mon, 18 Feb 2019 11:12:08 -0800 (PST) Received: from squirtle.lan (c-24-22-235-96.hsd1.wa.comcast.net. [24.22.235.96]) by smtp.gmail.com with ESMTPSA id t12sm33189727pgq.68.2019.02.18.11.12.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Feb 2019 11:12:08 -0800 (PST) From: Andrey Smirnov To: linux-pm@vger.kernel.org Cc: Andrey Smirnov , Chris Healy , Lucas Stach , Zhang Rui , Eduardo Valentin , Daniel Lezcano , linux-imx@nxp.com, linux-kernel@vger.kernel.org Subject: [PATCH 07/12] thermal: qoriq: Convert driver to use regmap API Date: Mon, 18 Feb 2019 11:11:36 -0800 Message-Id: <20190218191141.3729-8-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190218191141.3729-1-andrew.smirnov@gmail.com> References: <20190218191141.3729-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert driver to use regmap API, drop custom LE/BE IO helpers and simplify bit manipulation using regmap_update_bits(). This also allows us to convert some register initialization to use loops and adds convenient debug access to TMU registers via debugfs. Signed-off-by: Andrey Smirnov Cc: Chris Healy Cc: Lucas Stach Cc: Zhang Rui Cc: Eduardo Valentin Cc: Daniel Lezcano Cc: linux-imx@nxp.com Cc: linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- drivers/thermal/qoriq_thermal.c | 162 +++++++++++++++----------------- 1 file changed, 77 insertions(+), 85 deletions(-) diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c index 90af4c4caa52..97419ce70d83 100644 --- a/drivers/thermal/qoriq_thermal.c +++ b/drivers/thermal/qoriq_thermal.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include "thermal_core.h" @@ -18,80 +19,42 @@ /* * QorIQ TMU Registers */ -struct qoriq_tmu_site_regs { - u32 tritsr; /* Immediate Temperature Site Register */ - u32 tratsr; /* Average Temperature Site Register */ - u8 res0[0x8]; -}; -struct qoriq_tmu_regs { - u32 tmr; /* Mode Register */ +#define REGS_TMR 0x000 /* Mode Register */ #define TMR_DISABLE 0x0 #define TMR_ME 0x80000000 #define TMR_ALPF 0x0c000000 - u32 tsr; /* Status Register */ - u32 tmtmir; /* Temperature measurement interval Register */ + +#define REGS_TMTMIR 0x008 /* Temperature measurement interval Register */ #define TMTMIR_DEFAULT 0x0000000f - u8 res0[0x14]; - u32 tier; /* Interrupt Enable Register */ + +#define REGS_TIER 0x020 /* Interrupt Enable Register */ #define TIER_DISABLE 0x0 - u32 tidr; /* Interrupt Detect Register */ - u32 tiscr; /* Interrupt Site Capture Register */ - u32 ticscr; /* Interrupt Critical Site Capture Register */ - u8 res1[0x10]; - u32 tmhtcrh; /* High Temperature Capture Register */ - u32 tmhtcrl; /* Low Temperature Capture Register */ - u8 res2[0x8]; - u32 tmhtitr; /* High Temperature Immediate Threshold */ - u32 tmhtatr; /* High Temperature Average Threshold */ - u32 tmhtactr; /* High Temperature Average Crit Threshold */ - u8 res3[0x24]; - u32 ttcfgr; /* Temperature Configuration Register */ - u32 tscfgr; /* Sensor Configuration Register */ - u8 res4[0x78]; - struct qoriq_tmu_site_regs site[SITES_MAX]; - u8 res5[0x9f8]; - u32 ipbrr0; /* IP Block Revision Register 0 */ - u32 ipbrr1; /* IP Block Revision Register 1 */ - u8 res6[0x310]; - u32 ttr0cr; /* Temperature Range 0 Control Register */ - u32 ttr1cr; /* Temperature Range 1 Control Register */ - u32 ttr2cr; /* Temperature Range 2 Control Register */ - u32 ttr3cr; /* Temperature Range 3 Control Register */ -}; +#define REGS_TTCFGR 0x080 /* Temperature Configuration Register */ +#define REGS_TSCFGR 0x084 /* Sensor Configuration Register */ + +#define REGS_TRITSR(n) (0x100 + 16 * (n)) /* Immediate Temperature + * Site Register + */ +#define REGS_TTRnCR(n) (0xf10 + 4 * (n)) /* Temperature Range n + * Control Register + */ /* * Thermal zone data */ struct qoriq_tmu_data { struct thermal_zone_device *tz; - struct qoriq_tmu_regs __iomem *regs; + struct regmap *regmap; int sensor_id; - bool little_endian; }; -static void tmu_write(struct qoriq_tmu_data *p, u32 val, void __iomem *addr) -{ - if (p->little_endian) - iowrite32(val, addr); - else - iowrite32be(val, addr); -} - -static u32 tmu_read(struct qoriq_tmu_data *p, void __iomem *addr) -{ - if (p->little_endian) - return ioread32(addr); - else - return ioread32be(addr); -} - static int tmu_get_temp(void *p, int *temp) { u32 val; struct qoriq_tmu_data *data = p; - val = tmu_read(data, &data->regs->site[data->sensor_id].tritsr); + regmap_read(data->regmap, REGS_TRITSR(data->sensor_id), &val); *temp = (val & 0xff) * 1000; return 0; @@ -146,10 +109,8 @@ static int qoriq_tmu_calibration(struct device *dev, } /* Init temperature range registers */ - tmu_write(data, range[0], &data->regs->ttr0cr); - tmu_write(data, range[1], &data->regs->ttr1cr); - tmu_write(data, range[2], &data->regs->ttr2cr); - tmu_write(data, range[3], &data->regs->ttr3cr); + for (i = 0; i < ARRAY_SIZE(range); i++) + regmap_write(data->regmap, REGS_TTRnCR(i), range[i]); calibration = of_get_property(np, "fsl,tmu-calibration", &len); if (calibration == NULL || len % 8) { @@ -159,9 +120,9 @@ static int qoriq_tmu_calibration(struct device *dev, for (i = 0; i < len; i += 8, calibration += 2) { val = of_read_number(calibration, 1); - tmu_write(data, val, &data->regs->ttcfgr); + regmap_write(data->regmap, REGS_TTCFGR, val); val = of_read_number(calibration + 1, 1); - tmu_write(data, val, &data->regs->tscfgr); + regmap_write(data->regmap, REGS_TSCFGR, val); } return 0; @@ -170,19 +131,40 @@ static int qoriq_tmu_calibration(struct device *dev, static void qoriq_tmu_init_device(struct qoriq_tmu_data *data) { /* Disable interrupt, using polling instead */ - tmu_write(data, TIER_DISABLE, &data->regs->tier); + regmap_write(data->regmap, REGS_TIER, TIER_DISABLE); /* Set update_interval */ - tmu_write(data, TMTMIR_DEFAULT, &data->regs->tmtmir); + regmap_write(data->regmap, REGS_TMTMIR, TMTMIR_DEFAULT); /* Disable monitoring */ - tmu_write(data, TMR_DISABLE, &data->regs->tmr); + regmap_write(data->regmap, REGS_TMR, TMR_DISABLE); } static const struct thermal_zone_of_device_ops tmu_tz_ops = { .get_temp = tmu_get_temp, }; +static const struct regmap_range qiriq_wr_yes_ranges[] = { + regmap_reg_range(REGS_TMR, REGS_TSCFGR), + regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(3)), +}; + +static const struct regmap_access_table qiriq_wr_table = { + .yes_ranges = qiriq_wr_yes_ranges, + .n_yes_ranges = ARRAY_SIZE(qiriq_wr_yes_ranges), +}; + +static const struct regmap_range qiriq_rd_yes_ranges[] = { + regmap_reg_range(REGS_TMR, REGS_TSCFGR), + regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(3)), + regmap_reg_range(REGS_TRITSR(0), REGS_TRITSR(15)), +}; + +static const struct regmap_access_table qiriq_rd_table = { + .yes_ranges = qiriq_rd_yes_ranges, + .n_yes_ranges = ARRAY_SIZE(qiriq_rd_yes_ranges), +}; + static int qoriq_tmu_probe(struct platform_device *pdev) { int ret; @@ -190,6 +172,19 @@ static int qoriq_tmu_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct device *dev = &pdev->dev; struct resource *io; + const bool little_endian = of_property_read_bool(np, "little-endian"); + const enum regmap_endian format_endian = + little_endian ? REGMAP_ENDIAN_LITTLE : REGMAP_ENDIAN_BIG; + const struct regmap_config regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .rd_table = &qiriq_rd_table, + .wr_table = &qiriq_wr_table, + .val_format_endian = format_endian, + .max_register = SZ_4K, + }; + void __iomem *base; u32 site; data = devm_kzalloc(dev, sizeof(struct qoriq_tmu_data), @@ -197,8 +192,6 @@ static int qoriq_tmu_probe(struct platform_device *pdev) if (!data) return -ENOMEM; - data->little_endian = of_property_read_bool(np, "little-endian"); - data->sensor_id = qoriq_tmu_get_sensor_id(); if (data->sensor_id < 0) { dev_err(dev, "Failed to get sensor id\n"); @@ -211,12 +204,19 @@ static int qoriq_tmu_probe(struct platform_device *pdev) return -ENODEV; } - data->regs = devm_ioremap(dev, io->start, resource_size(io)); - if (!data->regs) { + base = devm_ioremap(dev, io->start, resource_size(io)); + if (!base) { dev_err(dev, "Failed to get memory region\n"); return -ENODEV; } + data->regmap = devm_regmap_init_mmio(dev, base, ®map_config); + if (IS_ERR(data->regmap)) { + ret = PTR_ERR(data->regmap); + dev_err(dev, "Failed to init regmap (%d)\n", ret); + return ret; + } + qoriq_tmu_init_device(data); /* TMU initialization */ ret = qoriq_tmu_calibration(dev, data); /* TMU calibration */ @@ -241,7 +241,7 @@ static int qoriq_tmu_probe(struct platform_device *pdev) /* Enable monitoring */ site = 0x1 << (15 - data->sensor_id); - tmu_write(data, site | TMR_ME | TMR_ALPF, &data->regs->tmr); + regmap_write(data->regmap, REGS_TMR, site | TMR_ME | TMR_ALPF); return 0; } @@ -251,7 +251,7 @@ static int qoriq_tmu_remove(struct platform_device *pdev) struct qoriq_tmu_data *data = platform_get_drvdata(pdev); /* Disable monitoring */ - tmu_write(data, TMR_DISABLE, &data->regs->tmr); + regmap_write(data->regmap, REGS_TMR, TMR_DISABLE); platform_set_drvdata(pdev, NULL); @@ -259,30 +259,22 @@ static int qoriq_tmu_remove(struct platform_device *pdev) } #ifdef CONFIG_PM_SLEEP -static int qoriq_tmu_suspend(struct device *dev) + +static int qoriq_tmu_suspend_resume(struct device *dev, unsigned int val) { - u32 tmr; struct qoriq_tmu_data *data = dev_get_drvdata(dev); - /* Disable monitoring */ - tmr = tmu_read(data, &data->regs->tmr); - tmr &= ~TMR_ME; - tmu_write(data, tmr, &data->regs->tmr); + return regmap_update_bits(data->regmap, REGS_TMR, TMR_ME, val); +} - return 0; +static int qoriq_tmu_suspend(struct device *dev) +{ + return qoriq_tmu_suspend_resume(dev, 0); } static int qoriq_tmu_resume(struct device *dev) { - u32 tmr; - struct qoriq_tmu_data *data = dev_get_drvdata(dev); - - /* Enable monitoring */ - tmr = tmu_read(data, &data->regs->tmr); - tmr |= TMR_ME; - tmu_write(data, tmr, &data->regs->tmr); - - return 0; + return qoriq_tmu_suspend_resume(dev, TMR_ME); } #endif -- 2.20.1