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[209.132.180.67]) by mx.google.com with ESMTP id c15si2009868pgj.13.2019.02.18.18.49.17; Mon, 18 Feb 2019 18:49:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733127AbfBSBxV (ORCPT + 99 others); Mon, 18 Feb 2019 20:53:21 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:43565 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1732932AbfBSBxV (ORCPT ); Mon, 18 Feb 2019 20:53:21 -0500 X-UUID: 09369e495cb34712b61f8f766755b2e0-20190219 X-UUID: 09369e495cb34712b61f8f766755b2e0-20190219 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1509288187; Tue, 19 Feb 2019 09:53:13 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 19 Feb 2019 09:53:12 +0800 Received: from [10.16.6.141] (10.16.6.141) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 19 Feb 2019 09:53:10 +0800 Message-ID: <1550541190.13121.2.camel@mszsdaap41> Subject: Re: [PATCH] drm/mediatek: add mt8183 dpi support From: Jitao Shi To: CK Hu CC: Rob Herring , Pawel Moll , "Mark Rutland" , Ian Campbell , Kumar Gala , , David Airlie , "Matthias Brugger" , Thierry Reding , "Ajay Kumar" , Inki Dae , "Rahul Sharma" , Sean Paul , Vincent Palatin , Andy Yan , Philipp Zabel , "Russell King" , , , , , , , Sascha Hauer , , , , , Date: Tue, 19 Feb 2019 09:53:10 +0800 In-Reply-To: <1550160809.6862.13.camel@mtksdaap41> References: <20190211045059.11821-1-jitao.shi@mediatek.com> <1550160809.6862.13.camel@mtksdaap41> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2019-02-15 at 00:13 +0800, CK Hu wrote: > Hi, Jitao: > > On Mon, 2019-02-11 at 12:50 +0800, Jitao Shi wrote: > > MT8183 sample on rising and falling edge. It can reduce half data io. > > > > Signed-off-by: Jitao Shi > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 29 +++++++++++++++++++++++++++++ > > 1 file changed, 29 insertions(+) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index 62a9d47df948..610c23334047 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -117,6 +117,7 @@ struct mtk_dpi_conf { > > unsigned int (*cal_factor)(int clock); > > u32 reg_h_fre_con; > > bool edge_sel_en; > > + bool dual_edge; > > }; > > > > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask) > > @@ -353,6 +354,13 @@ static void mtk_dpi_config_disable_edge(struct mtk_dpi *dpi) > > mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN); > > } > > > > +static void mtk_dpi_enable_dual_edge(struct mtk_dpi *dpi) > > +{ > > + mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, > > + DDR_EN | DDR_4PHASE); > > + mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, EDGE_SEL, EDGE_SEL); > > +} > > All these register exist in MT8173, if you do the same setting in > MT8173, could it also sample on rising edge and falling edge? > > Regards, > CK Hi CK, MT8173 has those registers. But the hw function is removed. So MT8173 doesn't support DPI dual edge sample. Best Regards Jitao > > > + > > static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, > > enum mtk_dpi_out_color_format format) > > { > > @@ -509,6 +517,8 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, > > mtk_dpi_config_color_format(dpi, dpi->color_format); > > mtk_dpi_config_2n_h_fre(dpi); > > mtk_dpi_config_disable_edge(dpi); > > + if (dpi->conf->dual_edge) > > + mtk_dpi_enable_dual_edge(dpi); > > mtk_dpi_sw_reset(dpi, false); > > > > return 0; > > @@ -671,6 +681,16 @@ static unsigned int mt2701_calculate_factor(int clock) > > return 2; > > } > > > > +static unsigned int mt8183_calculate_factor(int clock) > > +{ > > + if (clock <= 27000) > > + return 8; > > + else if (clock <= 167000) > > + return 4; > > + else > > + return 2; > > +} > > + > > static const struct mtk_dpi_conf mt8173_conf = { > > .cal_factor = mt8173_calculate_factor, > > .reg_h_fre_con = 0xe0, > > @@ -682,6 +702,12 @@ static const struct mtk_dpi_conf mt2701_conf = { > > .edge_sel_en = true, > > }; > > > > +static const struct mtk_dpi_conf mt8183_conf = { > > + .cal_factor = mt8183_calculate_factor, > > + .reg_h_fre_con = 0xe0, > > + .dual_edge = true, > > +}; > > + > > static int mtk_dpi_probe(struct platform_device *pdev) > > { > > struct device *dev = &pdev->dev; > > @@ -777,6 +803,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = { > > { .compatible = "mediatek,mt8173-dpi", > > .data = &mt8173_conf, > > }, > > + { .compatible = "mediatek,mt8183-dpi", > > + .data = &mt8183_conf, > > + }, > > { }, > > }; > > > >