Received: by 2002:ac0:946b:0:0:0:0:0 with SMTP id j40csp3500259imj; Tue, 19 Feb 2019 04:44:12 -0800 (PST) X-Google-Smtp-Source: AHgI3IZ3p85vbhkRv+nlXyrNmTodUZp2dB2BsuRaSpNUahPHGH01uiSPDJzUhi3t281yFJAWBQ1B X-Received: by 2002:a63:e742:: with SMTP id j2mr24182347pgk.172.1550580252721; Tue, 19 Feb 2019 04:44:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550580252; cv=none; d=google.com; s=arc-20160816; b=RXh9YSETw2VFuMAEi47usL56rj3nv/qtr87H30CqJ6g+QupP0Ojz9MC8bkjHNz0VAM CtExb5Wvmh/p2ps5H9ZsYt65NVgchEFtuBPLfM40iobn8jPMsSzp677zWzuDULS3DjqI iNV5wpbS8AJFrBprRPsvhzV2Myt2XewoJhW7pGMM3Qu5dCJW5JFHIr4Ru01VsVDoqKf4 ngnM9/mAJB1eOEpYjD71zi+PkpPcsJ9WJRWz9jTHKoM+wQ5LFsV39H+BftHSljRsGUSh 0r2oWenVZr9We3NcfC9nGjYoNOFRYQDz/s65UDv/N4CMxTStbEqcksHJgoQafLlPgAxv d7dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=m6s7k4w/pDBjqVyzjn5I2cQymUoWyjyWZJ5ObZDhWQE=; b=Y9102ReEfmKFj9JHf/VcD/vSeWcuRvRRRX4z2CacKWwvaePyF69Mr2g+w3F72YhyrT GpANPLZ1rBJovGwxgdKsxwiPnQL/JeYQv5SF/1B7MnMvi86W/5TyVvkQS2M4EYn/S8R7 cWEOykaDKqPhlSHvfPWemv4sFOUTWqbdw0yEYHP25ZInvvNczD2qXSBgCmRkgvh8GaHY 1ZZ8X5R7J/Ov6M5NJxh5BI/5bIt8cOFrkybquNume/ZzT4TxCFJJHEc3zfSEXwUrVY4V A2PjLXW5LLi12jqJR+T+sERWkD1KyImak7yJulb5DiWLkuZV7HVyz0q2WyVgJCtZjDmn KqUw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 98si11488233pla.320.2019.02.19.04.43.57; Tue, 19 Feb 2019 04:44:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728314AbfBSMmU (ORCPT + 99 others); Tue, 19 Feb 2019 07:42:20 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:44712 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726149AbfBSMmU (ORCPT ); Tue, 19 Feb 2019 07:42:20 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AE542EBD; Tue, 19 Feb 2019 04:42:19 -0800 (PST) Received: from e107981-ln.cambridge.arm.com (e107981-ln.cambridge.arm.com [10.1.197.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 542673F720; Tue, 19 Feb 2019 04:42:17 -0800 (PST) Date: Tue, 19 Feb 2019 12:42:14 +0000 From: Lorenzo Pieralisi To: Andrey Smirnov Cc: Bjorn Helgaas , Fabio Estevam , Chris Healy , Lucas Stach , Leonard Crestez , "A.s. Dong" , Richard Zhu , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org Subject: Re: [PATCH 0/2] "pcie_aux" clock for i.MX8MQ Message-ID: <20190219124214.GB15442@e107981-ln.cambridge.arm.com> References: <20190212015108.16952-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190212015108.16952-1-andrew.smirnov@gmail.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Feb 11, 2019 at 05:51:06PM -0800, Andrey Smirnov wrote: > Lorenzo: > > This small series adds code to control "pcie_aux" clock. This is an > oversight from original submission [pcie-imx8mq-v7], which was only > discovered once I submitted an RFC for corresponding DT changes going > via i.MX tree [imx-dt-rfc]. > > Thanks, > Andrey Smirnov > > [imx-dt-rfc] https://lore.kernel.org/lkml/20190131204333.31846-1-andrew.smirnov@gmail.com > [pcie-imx8mq-v7] https://lore.kernel.org/lkml/20190202001523.12517-1-andrew.smirnov@gmail.com > > Andrey Smirnov (2): > dt-bindings: imx6q-pcie: Add "pcie_aux" clock for imx8mq > PCI: imx6: Add code to request/control "pcie_aux" clock for i.MX8MQ > > .../devicetree/bindings/pci/fsl,imx6q-pcie.txt | 4 ++++ > drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++ > 2 files changed, 20 insertions(+) Hi Andrey, I have applied it to pci/dwc for v5.1, however it looks like it would break the driver with an old dts - I assume that's expected but let me know if there is a better way to handle this. Lorenzo