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[209.85.208.176]) by smtp.gmail.com with ESMTPSA id m28sm2039885lfj.44.2019.02.19.15.31.20 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 15:31:20 -0800 (PST) Received: by mail-lj1-f176.google.com with SMTP id j13-v6so19169190ljc.2 for ; Tue, 19 Feb 2019 15:31:20 -0800 (PST) X-Received: by 2002:a2e:9f0b:: with SMTP id u11mr19711923ljk.64.1550619079667; Tue, 19 Feb 2019 15:31:19 -0800 (PST) MIME-Version: 1.0 References: <1550394300-17420-1-git-send-email-yong.wu@mediatek.com> <1550394300-17420-11-git-send-email-yong.wu@mediatek.com> In-Reply-To: <1550394300-17420-11-git-send-email-yong.wu@mediatek.com> From: Evan Green Date: Tue, 19 Feb 2019 15:30:43 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v6 10/22] iommu/mediatek: Move reset_axi into plat_data To: Yong Wu Cc: Joerg Roedel , Matthias Brugger , Robin Murphy , Rob Herring , Tomasz Figa , Will Deacon , linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , LKML , linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, yingjoe.chen@mediatek.com, youlin.pei@mediatek.com, Nicolas Boichat , anan.sun@mediatek.com, Matthias Kaehlcke Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Feb 17, 2019 at 1:08 AM Yong Wu wrote: > > In mt8173 and mt8183, 0x48 is REG_MMU_STANDARD_AXI_MODE while it is > REG_MMU_CTRL in the other SoCs, and the bits meaning is completely > different with the REG_MMU_STANDARD_AXI_MODE. > > This patch moves this property to plat_data, it's also a preparing > patch for mt8183. > > Signed-off-by: Yong Wu > Reviewed-by: Nicolas Boichat Reviewed-by: Evan Green