Received: by 2002:ac0:a679:0:0:0:0:0 with SMTP id p54csp523899imp; Wed, 20 Feb 2019 04:32:42 -0800 (PST) X-Google-Smtp-Source: AHgI3IY5ME3wXy34+1J81e7uSV2vUZy51GhsPMP8zvRbRzKgu6S8eb4PzTpkLzfRXWta46UmHfEn X-Received: by 2002:a63:480c:: with SMTP id v12mr29610339pga.115.1550665962458; Wed, 20 Feb 2019 04:32:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550665962; cv=none; d=google.com; s=arc-20160816; b=KYL6IpN4a24mGobae1nOqjP5p/k5wuFwBsY6HSBURg27ZfnX27FG6t2KYjRxg6CTiF uA21QVUXXmVqRnFukAwhj4bKB07U2ub48K9ynXxVgLvlR9qaOvFTNElWGMZr7OWp98h2 4yuHuvN8OBk2cGm+AxYaNATfEKbDg+IvZPPpGRJygxaW0VaeBt/QT2LabB4MOJ3txRf4 leg3LQG1TV4FCo8po1tyi9Kebo99n5nY8dQ8OD0cvnPlgyD+aWQ8YkHMC6MHtX1jRczY QnHgzWddK8czarI/2zgU0rmCmC/vVIzzDCf9FPIZUTxEqwxSBJOXCBR7140tGiFPsue/ 7Cmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=yUVwDpkTpAdbWTbEl+LfMVxanjNaFPLW3xuXapqIlkw=; b=YbyHA+2NsAgrLo5dtmUIMiGthwmp5jXbRGLj1u/7AJ3T187OhlniDEqlknEpyZlffj 3F/MdVHueto453t3F7lCtjIFgXuCR1UAoyKVkEoUJzAVNPF/jmdb7+iOwKhXIPA7BFUj wMBtv9x5paa4XTAZulb5Ba+/zLIMKxuzbn9/ibpksWFUpuf/YgdHMmapAqSQZ0EI/99I FZKRvsP2pT79CTm1Lwam5GaCyDhB0SfRJXCWD0nubFvtsZ6KmxPMzkBRSGT4CJkMM/L7 sKmWAlS9/Kx6nBeYh/xLS4FfmWII+GZltG95kJmy8tP/HKTjMt5G4ZMmjXfJV9cvFzWw L3xQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d22si4271235plr.37.2019.02.20.04.32.27; Wed, 20 Feb 2019 04:32:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727613AbfBTMb5 (ORCPT + 99 others); Wed, 20 Feb 2019 07:31:57 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:32253 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727684AbfBTMbq (ORCPT ); Wed, 20 Feb 2019 07:31:46 -0500 X-UUID: 761184f6ff5746cc95d0391724651719-20190220 X-UUID: 761184f6ff5746cc95d0391724651719-20190220 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 714508559; Wed, 20 Feb 2019 20:31:38 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 20 Feb 2019 20:31:36 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 20 Feb 2019 20:31:35 +0800 From: To: Zhang Rui , Eduardo Valentin , Daniel Lezcano , Rob Herring , Mark Rutland , Matthias Brugger CC: , , , , , Michael Kao Subject: [PATCH v2,2/7] thermal: mediatek: add common index of vts settings. Date: Wed, 20 Feb 2019 20:31:28 +0800 Message-ID: <1550665893-22561-3-git-send-email-michael.kao@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1550665893-22561-1-git-send-email-michael.kao@mediatek.com> References: <1550665893-22561-1-git-send-email-michael.kao@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Michael Kao Each project has different number of vts settings. For the MT2701 just have to set three vts, but the original code flow add five unnecessary vts. Add common index of vts settings for scalablity, and reduce the setting of unnecessary vts. Signed-off-by: Michael Kao --- drivers/thermal/mtk_thermal.c | 93 ++++++++++++++++++++++++++++++++----------- 1 file changed, 69 insertions(+), 24 deletions(-) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index f646436..07f8ad7 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -112,17 +112,26 @@ * MT2701 has 3 sensors and needs 3 VTS calibration data. * MT2712 has 4 sensors and needs 4 VTS calibration data. */ -#define MT8173_CALIB_BUF0_VALID BIT(0) -#define MT8173_CALIB_BUF1_ADC_GE(x) (((x) >> 22) & 0x3ff) -#define MT8173_CALIB_BUF0_VTS_TS1(x) (((x) >> 17) & 0x1ff) -#define MT8173_CALIB_BUF0_VTS_TS2(x) (((x) >> 8) & 0x1ff) -#define MT8173_CALIB_BUF1_VTS_TS3(x) (((x) >> 0) & 0x1ff) -#define MT8173_CALIB_BUF2_VTS_TS4(x) (((x) >> 23) & 0x1ff) -#define MT8173_CALIB_BUF2_VTS_TSABB(x) (((x) >> 14) & 0x1ff) -#define MT8173_CALIB_BUF0_DEGC_CALI(x) (((x) >> 1) & 0x3f) -#define MT8173_CALIB_BUF0_O_SLOPE(x) (((x) >> 26) & 0x3f) -#define MT8173_CALIB_BUF0_O_SLOPE_SIGN(x) (((x) >> 7) & 0x1) -#define MT8173_CALIB_BUF1_ID(x) (((x) >> 9) & 0x1) +#define CALIB_BUF0_VALID BIT(0) +#define CALIB_BUF1_ADC_GE(x) (((x) >> 22) & 0x3ff) +#define CALIB_BUF0_VTS_TS1(x) (((x) >> 17) & 0x1ff) +#define CALIB_BUF0_VTS_TS2(x) (((x) >> 8) & 0x1ff) +#define CALIB_BUF1_VTS_TS3(x) (((x) >> 0) & 0x1ff) +#define CALIB_BUF2_VTS_TS4(x) (((x) >> 23) & 0x1ff) +#define CALIB_BUF2_VTS_TSABB(x) (((x) >> 14) & 0x1ff) +#define CALIB_BUF0_DEGC_CALI(x) (((x) >> 1) & 0x3f) +#define CALIB_BUF0_O_SLOPE(x) (((x) >> 26) & 0x3f) +#define CALIB_BUF0_O_SLOPE_SIGN(x) (((x) >> 7) & 0x1) +#define CALIB_BUF1_ID(x) (((x) >> 9) & 0x1) + +enum { + VTS1, + VTS2, + VTS3, + VTS4, + VTSABB, + MAX_NUM_VTS, +}; /* MT2701 thermal sensors */ #define MT2701_TS1 0 @@ -175,6 +184,7 @@ struct mtk_thermal_data { s32 num_banks; s32 num_sensors; s32 auxadc_channel; + const int *vts_index; const int *sensor_mux_values; const int *msr; const int *adcpnp; @@ -194,7 +204,7 @@ struct mtk_thermal { s32 adc_ge; s32 degc_cali; s32 o_slope; - s32 vts[MT8173_NUM_SENSORS]; + s32 vts[MAX_NUM_VTS]; const struct mtk_thermal_data *conf; struct mtk_thermal_bank banks[]; @@ -218,6 +228,10 @@ struct mtk_thermal { static const int mt8173_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 }; +static const int mt8173_vts_index[MT8173_NUM_SENSORS] = { + VTS1, VTS2, VTS3, VTS4, VTSABB +}; + /* MT2701 thermal sensor data */ static const int mt2701_bank_data[MT2701_NUM_SENSORS] = { MT2701_TS1, MT2701_TS2, MT2701_TSABB @@ -233,6 +247,10 @@ struct mtk_thermal { static const int mt2701_mux_values[MT2701_NUM_SENSORS] = { 0, 1, 16 }; +static const int mt2701_vts_index[MT2701_NUM_SENSORS] = { + VTS1, VTS2, VTS3 +}; + /* MT2712 thermal sensor data */ static const int mt2712_bank_data[MT2712_NUM_SENSORS] = { MT2712_TS1, MT2712_TS2, MT2712_TS3, MT2712_TS4 @@ -248,11 +266,16 @@ struct mtk_thermal { static const int mt2712_mux_values[MT2712_NUM_SENSORS] = { 0, 1, 2, 3 }; +static const int mt2712_vts_index[MT2712_NUM_SENSORS] = { + VTS1, VTS2, VTS3, VTS4 +}; + /* MT7622 thermal sensor data */ static const int mt7622_bank_data[MT7622_NUM_SENSORS] = { MT7622_TS1, }; static const int mt7622_msr[MT7622_NUM_SENSORS_PER_ZONE] = { TEMP_MSR0, }; static const int mt7622_adcpnp[MT7622_NUM_SENSORS_PER_ZONE] = { TEMP_ADCPNP0, }; static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, }; +static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 }; /** * The MT8173 thermal controller has four banks. Each bank can read up to @@ -271,6 +294,7 @@ struct mtk_thermal { .auxadc_channel = MT8173_TEMP_AUXADC_CHANNEL, .num_banks = MT8173_NUM_ZONES, .num_sensors = MT8173_NUM_SENSORS, + .vts_index = mt8173_vts_index, .bank_data = { { .num_sensors = 2, @@ -305,6 +329,7 @@ struct mtk_thermal { .auxadc_channel = MT2701_TEMP_AUXADC_CHANNEL, .num_banks = 1, .num_sensors = MT2701_NUM_SENSORS, + .vts_index = mt2701_vts_index, .bank_data = { { .num_sensors = 3, @@ -330,6 +355,7 @@ struct mtk_thermal { .auxadc_channel = MT2712_TEMP_AUXADC_CHANNEL, .num_banks = 1, .num_sensors = MT2712_NUM_SENSORS, + .vts_index = mt2712_vts_index, .bank_data = { { .num_sensors = 4, @@ -349,6 +375,7 @@ struct mtk_thermal { .auxadc_channel = MT7622_TEMP_AUXADC_CHANNEL, .num_banks = MT7622_NUM_ZONES, .num_sensors = MT7622_NUM_SENSORS, + .vts_index = mt7622_vts_index, .bank_data = { { .num_sensors = 1, @@ -629,19 +656,37 @@ static int mtk_thermal_get_calibration_data(struct device *dev, goto out; } - if (buf[0] & MT8173_CALIB_BUF0_VALID) { - mt->adc_ge = MT8173_CALIB_BUF1_ADC_GE(buf[1]); - mt->vts[MT8173_TS1] = MT8173_CALIB_BUF0_VTS_TS1(buf[0]); - mt->vts[MT8173_TS2] = MT8173_CALIB_BUF0_VTS_TS2(buf[0]); - mt->vts[MT8173_TS3] = MT8173_CALIB_BUF1_VTS_TS3(buf[1]); - mt->vts[MT8173_TS4] = MT8173_CALIB_BUF2_VTS_TS4(buf[2]); - mt->vts[MT8173_TSABB] = MT8173_CALIB_BUF2_VTS_TSABB(buf[2]); - mt->degc_cali = MT8173_CALIB_BUF0_DEGC_CALI(buf[0]); - if (MT8173_CALIB_BUF1_ID(buf[1]) & - MT8173_CALIB_BUF0_O_SLOPE_SIGN(buf[0])) - mt->o_slope = -MT8173_CALIB_BUF0_O_SLOPE(buf[0]); + if (buf[0] & CALIB_BUF0_VALID) { + mt->adc_ge = CALIB_BUF1_ADC_GE(buf[1]); + + for (i = 0; i < mt->conf->num_sensors; i++) { + switch (mt->conf->vts_index[i]) { + case VTS1: + mt->vts[VTS1] = CALIB_BUF0_VTS_TS1(buf[0]); + break; + case VTS2: + mt->vts[VTS2] = CALIB_BUF0_VTS_TS2(buf[0]); + break; + case VTS3: + mt->vts[VTS3] = CALIB_BUF1_VTS_TS3(buf[1]); + break; + case VTS4: + mt->vts[VTS4] = CALIB_BUF2_VTS_TS4(buf[2]); + break; + case VTSABB: + mt->vts[VTSABB] = CALIB_BUF2_VTS_TSABB(buf[2]); + break; + default: + break; + } + } + + mt->degc_cali = CALIB_BUF0_DEGC_CALI(buf[0]); + if (CALIB_BUF1_ID(buf[1]) & + CALIB_BUF0_O_SLOPE_SIGN(buf[0])) + mt->o_slope = -CALIB_BUF0_O_SLOPE(buf[0]); else - mt->o_slope = MT8173_CALIB_BUF0_O_SLOPE(buf[0]); + mt->o_slope = CALIB_BUF0_O_SLOPE(buf[0]); } else { dev_info(dev, "Device not calibrated, using default calibration values\n"); } -- 1.9.1