Received: by 2002:ac0:a679:0:0:0:0:0 with SMTP id p54csp766521imp; Wed, 20 Feb 2019 08:37:57 -0800 (PST) X-Google-Smtp-Source: AHgI3IZRBJ7HxLHQG7s3pvZeCPE4FVlkFSZ6cCGkTaR7f4loh3/af+1dcuD8eV1hDE7EkzyFe4IG X-Received: by 2002:a17:902:930b:: with SMTP id bc11mr38054837plb.101.1550680677004; Wed, 20 Feb 2019 08:37:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550680676; cv=none; d=google.com; s=arc-20160816; b=eA2s7+ZZeKS3cCTfultv0B0EYNOGATu5pS9wk6x7Oq+HZUAUWX4R0h2M8ULmtkgB/V 5KCQyMMM/W9gm7qBE4D8qWZdrIxgCrAe3ljER6BYNNeCwy9EhR4ygjmV0GPR4i0Zvz34 V7S74NE9egbuaTpJ9Mqv/3xAxz8sKWtpGEEJ7P5lVHuv6umA1E/8GQoQRIIkRW3LG7GO UNiEzP70dHzkZ2ER3SqF6gfj3mUQAp5tsKuagYW8xYdLdKIx3Ehs2mM+nuXSrVj+CWOt 5suDaes+dFNOQC1XZpILPnrWFoQjkVGDlvOpQ/HIQORABJcwRmdqdQlRy5fBn71rAmCW Psjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=d3wIEHXBWnZf/SyaxWXew2WCrKpInmNQu3PIIUMImDk=; b=qmc31+t6uNr1eEnbnFBBYQeZn3rK3A3u14CxjhWSN1HkT/jJ+GkWuIwjOMMA2G4mR9 Vy2DfsjnX5yMge82sy5HPQzX5tXb1eO3+L4VNYr2L8A4Ecqv7FzSolazD+lVPAExcNqX l5TVwAvnBxhsqSttsTvLTlz/yPt1z27uNOenmTJHZDRmTzzH9g4iuKG1gxHyUs6YIsiF wFJdWPGQ9a1KJ0JuCoChcaFXif/E3EpkUFK7UQTwB+BgqGu86Xet9gWLcwCtjrnC1WVA 7kLhgln1HRfFV2KM/m2UpcrQ2x5d0m8kimbHcm+/niWWQe5LLDRyMLloAc64SmcfQ+Sa 794g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a89si4716996pla.362.2019.02.20.08.37.41; Wed, 20 Feb 2019 08:37:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726994AbfBTQgz (ORCPT + 99 others); Wed, 20 Feb 2019 11:36:55 -0500 Received: from muru.com ([72.249.23.125]:39878 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725798AbfBTQgz (ORCPT ); Wed, 20 Feb 2019 11:36:55 -0500 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id 94ACD80E1; Wed, 20 Feb 2019 16:37:04 +0000 (UTC) Date: Wed, 20 Feb 2019 08:36:51 -0800 From: Tony Lindgren To: Lokesh Vutla Cc: Nishanth Menon , Device Tree Mailing List , jason@lakedaemon.net, Peter Ujfalusi , marc.zyngier@arm.com, Sekhar Nori , linux-kernel@vger.kernel.org, Tero Kristo , Rob Herring , Santosh Shilimkar , tglx@linutronix.de, Linux ARM Mailing List , Linus Walleij Subject: Re: [PATCH v5 05/10] dt-bindings: irqchip: Introduce TISCI Interrupt router bindings Message-ID: <20190220163651.GS15711@atomide.com> References: <4791de04-63af-4c5e-db9c-47634fcb8dc9@ti.com> <20190214154100.GB5720@atomide.com> <20190214174612.GF5720@atomide.com> <171e8597-2156-747d-d024-7b4bfc6f9186@ti.com> <20190215161629.GK5720@atomide.com> <2369739e-3bc8-257a-99e0-db2951c6777d@ti.com> <20190218143245.GC15711@atomide.com> <84b3ec21-9ce9-b9a8-80a9-75001db43a90@ti.com> <20190219153537.GJ15711@atomide.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190219153537.GJ15711@atomide.com> User-Agent: Mutt/1.11.2 (2019-01-07) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Some more info on chained irq vs mux below that might help. * Tony Lindgren [190219 15:36]: > * Lokesh Vutla [190219 08:51]: > > With this can you tell me how can we not have a device-tree and still support > > irq allocation? > > Using standard dts reg property to differentiate the interrupt > router instances. And if the interrupt router is a mux, you should > treat it as a mux rather than a chained interrupt controller. > > We do have drivers/mux nowadays, not sure if it helps in this case > as at least timer interrupts need to be configured very early. Adding Linus Walleij to Cc since he posted a good test to consider if something should use chained (or nested) irq: "individual masking and ACKing bits and can all be used at the same time" [0] Not sure if we have that documented somewhere? But seems like the interrupt router should be set up as a separate mux driver talking with firmware that the interrupt controller driver calls on request_irq()? Cheers, Tony [0] https://marc.info/?l=linux-omap&m=155065629529311&w=2