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[209.132.180.67]) by mx.google.com with ESMTP id m6si278526pfh.271.2019.02.21.16.53.00; Thu, 21 Feb 2019 16:53:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=JZqGxsPC; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726517AbfBVAwX (ORCPT + 99 others); Thu, 21 Feb 2019 19:52:23 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:4676 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726067AbfBVAwX (ORCPT ); Thu, 21 Feb 2019 19:52:23 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 21 Feb 2019 16:52:31 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Thu, 21 Feb 2019 16:52:22 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Thu, 21 Feb 2019 16:52:22 -0800 Received: from [172.17.136.14] (172.20.13.39) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 22 Feb 2019 00:52:22 +0000 Subject: Re: [PATCH V3] arm64: tegra: add topology data for Tegra194 cpu To: , CC: , , , References: <20190213081252.GA647@ulmo> <1550075622-1072-1-git-send-email-byan@nvidia.com> X-Nvconfidentiality: public From: Bo Yan Message-ID: Date: Thu, 21 Feb 2019 16:52:21 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: <1550075622-1072-1-git-send-email-byan@nvidia.com> X-Originating-IP: [172.20.13.39] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL101.nvidia.com (172.20.187.10) Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1550796751; bh=kaFeCAeiQE6H2VW9/YAxCoEcwKzsTPPj/vBN81xJ1QM=; h=X-PGP-Universal:Subject:To:CC:References:X-Nvconfidentiality:From: Message-ID:Date:User-Agent:MIME-Version:In-Reply-To: X-Originating-IP:X-ClientProxiedBy:Content-Type:Content-Language: Content-Transfer-Encoding; b=JZqGxsPCEB4Yog6e2pxd4YUWRb1NQjZ7Gi1ePnwSFhqi2+3y3xQZsEKOsRFt6WsV0 nWAO+ecJhBc7AE+9/mLx+byD2mfz9xnMmz+orZ6Esc6xUybBwvKcBD+G/iLOzPPjT0 Rmk2UmuFAdAmG1IS4he0ZXbeAdQS5bKfnOiDdU1lybRUSWVF//Ko45Elopv7BlUu11 BTdyacg+KmV5/Mtnxif5bqZzxTJoDCE/yw2c+twaBWE8l2bEW0cA/MHN0BBv8Ejq1U srl7b3Q/oXIUHHiYXA1YMcqo6zmHZm0VYaK+wDYDzSqsGFomnrNdmpY6119dxmRFpi eUIEfKIbqtjkw== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The patch V3 adopted changes suggested by Thierry. On 2/13/19 8:33 AM, Bo Yan wrote: > The xavier CPU architecture includes 8 CPU cores organized in > 4 clusters. Add cpu-map data for topology initialization, this > fixes the topology information in > /sys/devices/system/cpu/cpu[n]/topology > > Signed-off-by: Bo Yan > --- > V3: Replaced phandles with full path to CPU node > V2: remove cache nodes, add topology data only > > arch/arm64/boot/dts/nvidia/tegra194.dtsi | 42 ++++++++++++++++++++++++++++++++ > 1 file changed, 42 insertions(+) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi > index 6dfa1ca..708d20c 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi > @@ -870,6 +870,48 @@ > #address-cells = <1>; > #size-cells = <0>; > > + cpu-map { > + cluster0 { > + core0 { > + cpu = <&{/cpus/cpu@0}>; > + }; > + > + core1 { > + cpu = <&{/cpus/cpu@1}>; > + }; > + }; > + > + cluster1 { > + core0 { > + cpu = <&{/cpus/cpu@2}>; > + }; > + > + core1 { > + cpu = <&{/cpus/cpu@3}>; > + }; > + }; > + > + cluster2 { > + core0 { > + cpu = <&{/cpus/cpu@4}>; > + }; > + > + core1 { > + cpu = <&{/cpus/cpu@5}>; > + }; > + }; > + > + cluster3 { > + core0 { > + cpu = <&{/cpus/cpu@6}>; > + }; > + > + core1 { > + cpu = <&{/cpus/cpu@7}>; > + }; > + }; > + }; > + > cpu@0 { > compatible = "nvidia,tegra194-carmel", "arm,armv8"; > device_type = "cpu"; >