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[209.132.180.67]) by mx.google.com with ESMTP id 2si919172pfd.129.2019.02.22.00.38.43; Fri, 22 Feb 2019 00:38:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726626AbfBVIiD (ORCPT + 99 others); Fri, 22 Feb 2019 03:38:03 -0500 Received: from foss.arm.com ([217.140.101.70]:55812 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726376AbfBVIiC (ORCPT ); Fri, 22 Feb 2019 03:38:02 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 38C0280D; Fri, 22 Feb 2019 00:38:02 -0800 (PST) Received: from why.wild-wind.fr.eu.org (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A2EE93F703; Fri, 22 Feb 2019 00:37:59 -0800 (PST) Date: Fri, 22 Feb 2019 08:37:56 +0000 From: Marc Zyngier To: Leo Yan Cc: Christoffer Dall , Catalin Marinas , Will Deacon , Mark Rutland , James Morse , Andre Przywara , Jun Yao , Paolo Bonzini , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org Subject: Re: [PATCH v1 2/4] KVM: arm/arm64: vgic: Improve comment on kvm_vgic_inject_irq Message-ID: <20190222083756.359523ca@why.wild-wind.fr.eu.org> In-Reply-To: <20190222082327.3312-3-leo.yan@linaro.org> References: <20190222082327.3312-1-leo.yan@linaro.org> <20190222082327.3312-3-leo.yan@linaro.org> Organization: ARM Ltd X-Mailer: Claws Mail 3.17.1 (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 22 Feb 2019 16:23:24 +0800 Leo Yan wrote: > The function kvm_vgic_inject_irq() is not only used by PPIs but also can > be used to inject interrupt for SPIs; this patch improves comment for > argument @cpuid to reflect support SPIs as well. > > Signed-off-by: Leo Yan > --- > virt/kvm/arm/vgic/vgic.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c > index 7cfdfbc910e0..79fe64c15051 100644 > --- a/virt/kvm/arm/vgic/vgic.c > +++ b/virt/kvm/arm/vgic/vgic.c > @@ -394,7 +394,7 @@ bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq, > /** > * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic > * @kvm: The VM structure pointer > - * @cpuid: The CPU for PPIs > + * @cpuid: The CPU for PPIs and SPIs > * @intid: The INTID to inject a new state to. > * @level: Edge-triggered: true: to trigger the interrupt > * false: to ignore the call What does the CPU mean for SPIs? By definition, the routing of an SPI is defined by the distributor configuration. And what about LPIs? SGIs? I'm afraid you've misunderstood what cpuid is for. M. -- Without deviation from the norm, progress is not possible.