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Date:   25 Feb 2019 10:29:01 +0900
Message-ID: <878sy43bw3.wl-kuninori.morimoto.gx@renesas.com>
From:   Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
To:     <twischer@de.adit-jv.com>
Cc:     <patch@alsa-project.org>, <broonie@kernel.org>, <perex@perex.cz>,
        <tiwai@suse.com>, <alsa-devel@alsa-project.org>,
        <linux-kernel@vger.kernel.org>, Jiada Wang <jiada_wang@mentor.com>
Subject: Re: [PATCH] ASoC: rsnd: gen: fix SSI9 4/5/6/7 busif related register address
In-Reply-To: <1550827226-1750-1-git-send-email-twischer@de.adit-jv.com>
References: <1550827226-1750-1-git-send-email-twischer@de.adit-jv.com>
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Hi Jiada

Thank you for your patch

> Currently each SSI unit 's busif mode/adinr/dalign address is
> registered by: (in busif4 case)
> RSND_GEN_M_REG(SSI_BUSIF4_MODE, 0x500, 0x80)
> RSND_GEN_M_REG(SSI_BUSIF4_ADINR,0x504, 0x80)
> RSND_GEN_M_REG(SSI_BUSIF4_DALIGN, 0x508, 0x80)
> 
> But according to user manual 41.1.4 Register Configuration
> ssi9 4/5/6/7 busif mode/adinr/dalign register address
> ( SSI9-[4/5/6/7]_BUSIF_[MODE/ADINR/DALIGN] )
> are out of this rule.
> 
> This patch registers ssi9 4/5/6/7 mode/adinr/dalign register
> as single register, and access these these registers in case
> of SSI9 BUSIF 4/5/6/7.

I think
	- and access these these registers
	+ and access these registers

>  		if ((id == 9) && (busif >= 4)) {
> -			struct device *dev = rsnd_priv_to_dev(priv);
> -
> -			dev_err(dev, "This driver doesn't support SSI%d-%d, so far",
> -				id, busif);
> +			rsnd_mod_write(mod, SSI9_BUSIF_ADINR(busif),
> +				       rsnd_get_adinr_bit(mod, io) | chnl);
> +			rsnd_mod_write(mod, SSI9_BUSIF_MODE(busif),
> +				       rsnd_get_busif_shift(io, mod) | 1);
> +			rsnd_mod_write(mod, SSI9_BUSIF_DALIGN(busif),
> +				       rsnd_get_dalign(mod, io));
> +		} else {
> +			rsnd_mod_write(mod, SSI_BUSIF_ADINR(busif),
> +				       rsnd_get_adinr_bit(mod, io) | chnl);
> +			rsnd_mod_write(mod, SSI_BUSIF_MODE(busif),
> +				       rsnd_get_busif_shift(io, mod) | 1);
> +			rsnd_mod_write(mod, SSI_BUSIF_DALIGN(busif),
> +				       rsnd_get_dalign(mod, io));
>  		}
> -
> -		rsnd_mod_write(mod, SSI_BUSIF_ADINR(busif),
> -			       rsnd_get_adinr_bit(mod, io) |
> -			       (rsnd_io_is_play(io) ?
> -				rsnd_runtime_channel_after_ctu(io) :
> -				rsnd_runtime_channel_original(io)));
> -		rsnd_mod_write(mod, SSI_BUSIF_MODE(busif),
> -			       rsnd_get_busif_shift(io, mod) | 1);
> -		rsnd_mod_write(mod, SSI_BUSIF_DALIGN(busif),
> -			       rsnd_get_dalign(mod, io));
>  	}

Necessary register on rsnd_mod_write() is just number today.
So how about this ? Code will be more simple/readable

	if ((id == 9) && (busif >= 4)) {
		adinr	= SSI9_BUSIF_ADINR();
		mode	= SSI9_BUSIF_MODE();
		daligh	= SSI9_BUSIF_DALIGN();
	} else {
		adinr	= SSI_BUSIF_ADINR();
		mode	= SSI_BUSIF_MODE();
		daligh	= SSI_BUSIF_DALIGN();
	}

	rsnd_mod_write(mod, adinr,
			rsnd_get_adinr_bit(mod, io) | chnl);
	rsnd_mod_write(mod, mode,
			rsnd_get_busif_shift(io, mod) | 1);
	rsnd_mod_write(mod, dalign,
			rsnd_get_dalign(mod, io));