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Tue, 26 Feb 2019 07:06:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zc8Ql06AobFqiMbgo1afOGRQem95XHCnz7ED1GNv6Eg=; b=JChRC81HyG1FNKE1Vkw8GEr4gxbd171DK/eSVtJVriaqc5W/lQLMv/eBty3rg5e9k3t5UvPBo8p0SKaxokq82Z5SGuetA1tTEamejhx90JKjLEj3lL5kx1QzBI+Z5qcbvhqSLOJc5qkJ+8/QrXRf3S+4bU4m522AbUOud9BEoEs= Received: from VI1PR04MB4222.eurprd04.prod.outlook.com (52.134.31.21) by VI1PR04MB4991.eurprd04.prod.outlook.com (20.177.49.220) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1643.16; Tue, 26 Feb 2019 12:06:31 +0000 Received: from VI1PR04MB4222.eurprd04.prod.outlook.com ([fe80::b1cb:82a5:aacb:238d]) by VI1PR04MB4222.eurprd04.prod.outlook.com ([fe80::b1cb:82a5:aacb:238d%6]) with mapi id 15.20.1643.019; Tue, 26 Feb 2019 12:06:31 +0000 From: Aisheng Dong To: Anson Huang , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "ulf.hansson@linaro.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" CC: dl-linux-imx Subject: RE: [PATCH V4 1/2] dt-bindings: imx: remove unused resources from scu resource table Thread-Topic: [PATCH V4 1/2] dt-bindings: imx: remove unused resources from scu resource table Thread-Index: AQHUyyabNa6yXj+Xik+em+PrjLHzmaXx/6bAgAABHVA= Date: Tue, 26 Feb 2019 12:06:31 +0000 Message-ID: References: <1550891655-29043-1-git-send-email-Anson.Huang@nxp.com> In-Reply-To: Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [119.31.174.66] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: b685a3d6-b2be-45c0-242b-08d69be2d894 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020);SRVR:VI1PR04MB4991; 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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) authentication-results: spf=none (sender IP is ) smtp.mailfrom=aisheng.dong@nxp.com; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: TjdQXtwWFCk+pieovjlYrC7C39NPSmE19nakG4SFqAAb1jvTT+rT1BGl1pt71NcqCO2CF1NQ+UV7zG9PiaxoNLxfNGlFwnNlP2uZtprkV6dZq27utKOO7UbGu9kynLe5BP9s4XGbn7Zv6iAd69kMeB9MzUmpeHy2FIfMWNWPePnyz7HfiqMKY31S8QymgZV8GRWKcyDEFF5UIfvX4pkIaEIEKVSX16d1BiQwDsHTiM25e3JJ4lvUpXNzmfd34mXHuFthqFd8BkQCbleJwvwBUndRf1cqwGHz3WzhDCgzOeoTU/aZ4jdONxyFWP6/7TLpDfSVGZ5tGexr66CkoD5Sz6yHk5eShY0irfKe4dtyeADejYNSZBT29/SkUpWveFN1vMqITYhlmb1c8W4DLhnQnGwG/CYQQ21OBMiZXjKJ7Y0= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: b685a3d6-b2be-45c0-242b-08d69be2d894 X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Feb 2019 12:06:31.6734 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB4991 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > > Subject: [PATCH V4 1/2] dt-bindings: imx: remove unused resources from > > scu resource table > > > > Removes below resources which were defined during pre-silicon phase > > and the real silicons do NOT have them, they have never been used, > > latest system controller firmware also removed them: > > > > IMX_SC_R_DC_0_CAPTURE0 > > IMX_SC_R_DC_0_CAPTURE1 > > IMX_SC_R_DC_0_INTEGRAL0 > > IMX_SC_R_DC_0_INTEGRAL1 > > IMX_SC_R_DC_0_FRAC1 > > IMX_SC_R_DC_1_CAPTURE0 > > IMX_SC_R_DC_1_CAPTURE1 > > IMX_SC_R_DC_1_INTEGRAL0 > > IMX_SC_R_DC_1_INTEGRAL1 > > IMX_SC_R_DC_1_FRAC1 > > IMX_SC_R_GPU_3_PID0 > > IMX_SC_R_M4_0_SIM > > IMX_SC_R_M4_0_WDOG > > IMX_SC_R_M4_1_SIM > > IMX_SC_R_M4_1_WDOG > > > > Signed-off-by: Anson Huang >=20 > There're gaps left after removing, but I can't see it's actually a proble= m. > So: > Reviewed-by: Dong Aisheng >=20 Sorry, missed to comment that please update the patch title: dt-bindings: firmware: imx-scu: xxxx Regards Dong Aisheng > Regards > Dong Aisheng >=20 > > --- > > Changes since V3: > > - just remove those unused resource and no need to define UNUSED > > resource. > > -- > > include/dt-bindings/firmware/imx/rsrc.h | 15 --------------- > > 1 file changed, 15 deletions(-) > > > > diff --git a/include/dt-bindings/firmware/imx/rsrc.h > > b/include/dt-bindings/firmware/imx/rsrc.h > > index 4481f2d..d69f934 100644 > > --- a/include/dt-bindings/firmware/imx/rsrc.h > > +++ b/include/dt-bindings/firmware/imx/rsrc.h > > @@ -36,15 +36,10 @@ > > #define IMX_SC_R_DC_0_BLIT1 20 > > #define IMX_SC_R_DC_0_BLIT2 21 > > #define IMX_SC_R_DC_0_BLIT_OUT 22 > > -#define IMX_SC_R_DC_0_CAPTURE0 23 > > -#define IMX_SC_R_DC_0_CAPTURE1 24 > > #define IMX_SC_R_DC_0_WARP 25 > > -#define IMX_SC_R_DC_0_INTEGRAL0 26 > > -#define IMX_SC_R_DC_0_INTEGRAL1 27 > > #define IMX_SC_R_DC_0_VIDEO0 28 > > #define IMX_SC_R_DC_0_VIDEO1 29 > > #define IMX_SC_R_DC_0_FRAC0 30 > > -#define IMX_SC_R_DC_0_FRAC1 31 > > #define IMX_SC_R_DC_0 32 > > #define IMX_SC_R_GPU_2_PID0 33 > > #define IMX_SC_R_DC_0_PLL_0 34 > > @@ -53,17 +48,11 @@ > > #define IMX_SC_R_DC_1_BLIT1 37 > > #define IMX_SC_R_DC_1_BLIT2 38 > > #define IMX_SC_R_DC_1_BLIT_OUT 39 > > -#define IMX_SC_R_DC_1_CAPTURE0 40 > > -#define IMX_SC_R_DC_1_CAPTURE1 41 > > #define IMX_SC_R_DC_1_WARP 42 > > -#define IMX_SC_R_DC_1_INTEGRAL0 43 > > -#define IMX_SC_R_DC_1_INTEGRAL1 44 > > #define IMX_SC_R_DC_1_VIDEO0 45 > > #define IMX_SC_R_DC_1_VIDEO1 46 > > #define IMX_SC_R_DC_1_FRAC0 47 > > -#define IMX_SC_R_DC_1_FRAC1 48 > > #define IMX_SC_R_DC_1 49 > > -#define IMX_SC_R_GPU_3_PID0 50 > > #define IMX_SC_R_DC_1_PLL_0 51 > > #define IMX_SC_R_DC_1_PLL_1 52 > > #define IMX_SC_R_SPI_0 53 > > @@ -303,8 +292,6 @@ > > #define IMX_SC_R_M4_0_UART 287 > > #define IMX_SC_R_M4_0_I2C 288 > > #define IMX_SC_R_M4_0_INTMUX 289 > > -#define IMX_SC_R_M4_0_SIM 290 > > -#define IMX_SC_R_M4_0_WDOG 291 > > #define IMX_SC_R_M4_0_MU_0B 292 > > #define IMX_SC_R_M4_0_MU_0A0 293 > > #define IMX_SC_R_M4_0_MU_0A1 294 > > @@ -323,8 +310,6 @@ > > #define IMX_SC_R_M4_1_UART 307 > > #define IMX_SC_R_M4_1_I2C 308 > > #define IMX_SC_R_M4_1_INTMUX 309 > > -#define IMX_SC_R_M4_1_SIM 310 > > -#define IMX_SC_R_M4_1_WDOG 311 > > #define IMX_SC_R_M4_1_MU_0B 312 > > #define IMX_SC_R_M4_1_MU_0A0 313 > > #define IMX_SC_R_M4_1_MU_0A1 314 > > -- > > 2.7.4