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[209.132.180.67]) by mx.google.com with ESMTP id j26si9450905pff.289.2019.02.26.09.58.50; Tue, 26 Feb 2019 09:59:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=RaJr0Hfj; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728844AbfBZR6X (ORCPT + 99 others); Tue, 26 Feb 2019 12:58:23 -0500 Received: from mail.kernel.org ([198.145.29.99]:33444 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727801AbfBZR6W (ORCPT ); Tue, 26 Feb 2019 12:58:22 -0500 Received: from mail-qt1-f182.google.com (mail-qt1-f182.google.com [209.85.160.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id AD57921872; Tue, 26 Feb 2019 17:58:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1551203901; bh=m6mHCPsQQZC8jTP1o4TOZRKOZ9xUmuI55O4V3gjdiiU=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=RaJr0HfjehRTPbm+n9i0SK7AxsVAaKSJA6yIsH6PJoYPmh7ildBPV7bLfi+F4OklT 7Pdiles7+DiYl5sB0qSYwZOTjW2U6aY8RKvJ6H0coifNwxtQSzWVBlZmLnBh09ljWR LAAJWPDbDNmmOUxJXH8TANagrln6zPD6SCQLeu0Y= Received: by mail-qt1-f182.google.com with SMTP id j36so15921258qta.7; Tue, 26 Feb 2019 09:58:21 -0800 (PST) X-Gm-Message-State: AHQUAuYtM1pU50fm5JgyZfQe/UomSWlfsLeXOI8r7+dG4WT/fZqrBCYU RUVCWJXdM9OGCAHxTu5APt0S/vA7Oi7/1UEEFQ== X-Received: by 2002:ac8:25d1:: with SMTP id f17mr18495684qtf.38.1551203900827; Tue, 26 Feb 2019 09:58:20 -0800 (PST) MIME-Version: 1.0 References: <1548866336-14765-1-git-send-email-fabrice.gasnier@st.com> <1548866336-14765-2-git-send-email-fabrice.gasnier@st.com> <20190225165307.GA26260@bogus> In-Reply-To: From: Rob Herring Date: Tue, 26 Feb 2019 11:58:09 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/4] dt-bindings: nvmem: Add STM32 factory-programmed romem To: Fabrice Gasnier Cc: Srinivas Kandagatla , Alexandre Torgue , Mark Rutland , Maxime Coquelin , Lionel Debieve , devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 26, 2019 at 3:14 AM Fabrice Gasnier wrote: > > On 2/25/19 5:53 PM, Rob Herring wrote: > > On Wed, Jan 30, 2019 at 05:38:53PM +0100, Fabrice Gasnier wrote: > >> Add documentation for STMicroelectronics STM32 Factory-programmed > >> read only memory area. > >> > >> Signed-off-by: Fabrice Gasnier > >> --- > >> .../devicetree/bindings/nvmem/st,stm32-romem.txt | 31 ++++++++++++++++++++++ > >> 1 file changed, 31 insertions(+) > >> create mode 100644 Documentation/devicetree/bindings/nvmem/st,stm32-romem.txt > >> > >> diff --git a/Documentation/devicetree/bindings/nvmem/st,stm32-romem.txt b/Documentation/devicetree/bindings/nvmem/st,stm32-romem.txt > >> new file mode 100644 > >> index 0000000..fbff52e > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/nvmem/st,stm32-romem.txt > >> @@ -0,0 +1,31 @@ > >> +STMicroelectronics STM32 Factory-programmed data device tree bindings > >> + > >> +This represents STM32 Factory-programmed read only non-volatile area: locked > >> +flash, OTP, read-only HW regs... This contains various information such as: > > > > Several distinct types here. Does s/w need to know the difference > > rather than just one generic-ish compatible? Access size restrictions > > maybe? Ability to unlock and program? > > Hi Rob, > > The reading part is represented here as "st,stm32-romem" compatible, to > simply handle read only access. I agree this could be a generic-ish. > > BUT the specifics are regarding the ability to unlock/lock and program. > Access size can vary from one part to another (e.g. on stm32f4, > reference manual sates: OTP area is divided into 16 OTP data blocks of > 32 bytes. on stm32f7, OTP area is divided into 16 OTP data blocks of 64 > bytes.) > > In STM32MP15, both the read & write access through the BSEC are > specific, represented by dedicated compatible. > > Do you wish I update the compatible to something like: > "st,stm32f4-otp" > "st,stm32mp15-bsec" > ? Yes, I think given the above that makes sense. We can always map specific bindings to generic drivers, but not the reverse. Rob