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Tue, 26 Feb 2019 19:53:49 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=U242PBJRu26IEaVsclNbKDVbbV57a/JS8wvF5l1Z90c=; b=mHNd27kkhFEHJsTSuoo/L4d2oSsfqN2hjlX0x+q5uPU/qNVeSCXBa0GyT7Tyf1FnkMR2+yTb/PEDbXwj0++71Rl40oTFrxyg9EFGsVAKidReYTlA39HCdDA0+QBVM3lB71WkPZCv5SiX83IkWjvHhDUk5JLrsrMarFV/HNRdvG8= Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com (52.134.72.18) by DB3PR0402MB3771.eurprd04.prod.outlook.com (52.134.67.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1643.20; Wed, 27 Feb 2019 00:53:09 +0000 Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::1cb4:3e1c:fc85:7ed7]) by DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::1cb4:3e1c:fc85:7ed7%2]) with mapi id 15.20.1643.019; Wed, 27 Feb 2019 00:53:09 +0000 From: Anson Huang To: "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , Aisheng Dong , "ulf.hansson@linaro.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" CC: dl-linux-imx Subject: [PATCH RESEND V4 2/2] dt-bindings: firmware: imx-scu: add new resources to scu resource table Thread-Topic: [PATCH RESEND V4 2/2] dt-bindings: firmware: imx-scu: add new resources to scu resource table Thread-Index: AQHUzjbO6COAVhuAiESQl/ro/17JnA== Date: Wed, 27 Feb 2019 00:53:09 +0000 Message-ID: <1551228502-1535-2-git-send-email-Anson.Huang@nxp.com> References: <1551228502-1535-1-git-send-email-Anson.Huang@nxp.com> In-Reply-To: <1551228502-1535-1-git-send-email-Anson.Huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK2PR02CA0183.apcprd02.prod.outlook.com (2603:1096:201:21::19) To DB3PR0402MB3916.eurprd04.prod.outlook.com (2603:10a6:8:10::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; 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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: QIx8O/EZUTsGWyZF3QweA+Wp5N0jsu/g4oK61OxvL+15NvTIenbLfgPDooRdC+WZgC9sa6mbw0Qbl02O2SW7JdeTXinsNjumYR5KVTkIkQdYivgF4bbn8CeBPZr5oAXf+x+EHQZF1RnIQxmkh7Rcb0VcD+TG6QW848Q8IhcrAEbOYfYHVy9MxZlzytg7FEZ8YX/Y0eRg8xxr8xfXGRzQ85MtFsN5+B3gZ2vrt1yto+bwoq/WT2BdE8wDXxYoGL12o/Y0gU1XlAbZDlSjGCS102Qt8xe/FTQdcOcAQVZkV4Pyn+W1Dx6zPzn22qa7sAxGki46fYJ1hMQ5IgwuwPeAIYQbafaWxAYj8plPetBrXhsSx69mN3fZwciR0xagUiesGfEIZ+h9FXM/jr5rpl1Vw5ezT8lw45kH37Oqm7wKWGM= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8b978bca-2c47-4be6-382b-08d69c4df108 X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Feb 2019 00:53:04.9347 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3771 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add new resources as below according to latest system controller firmware for new features: IMX_SC_R_PERF IMX_SC_R_OCRAM IMX_SC_R_DMA_5_CH0 IMX_SC_R_DMA_5_CH1 IMX_SC_R_DMA_5_CH2 IMX_SC_R_DMA_5_CH3 IMX_SC_R_ATTESTATION Signed-off-by: Anson Huang Reviewed-by: Rob Herring Reviewed-by: Dong Aisheng --- include/dt-bindings/firmware/imx/rsrc.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/include/dt-bindings/firmware/imx/rsrc.h b/include/dt-bindings/= firmware/imx/rsrc.h index d69f934..4e61f64 100644 --- a/include/dt-bindings/firmware/imx/rsrc.h +++ b/include/dt-bindings/firmware/imx/rsrc.h @@ -36,6 +36,7 @@ #define IMX_SC_R_DC_0_BLIT1 20 #define IMX_SC_R_DC_0_BLIT2 21 #define IMX_SC_R_DC_0_BLIT_OUT 22 +#define IMX_SC_R_PERF 23 #define IMX_SC_R_DC_0_WARP 25 #define IMX_SC_R_DC_0_VIDEO0 28 #define IMX_SC_R_DC_0_VIDEO1 29 @@ -322,7 +323,7 @@ #define IMX_SC_R_IRQSTR_SCU2 321 #define IMX_SC_R_IRQSTR_DSP 322 #define IMX_SC_R_ELCDIF_PLL 323 -#define IMX_SC_R_UNUSED6 324 +#define IMX_SC_R_OCRAM 324 #define IMX_SC_R_AUDIO_PLL_0 325 #define IMX_SC_R_PI_0 326 #define IMX_SC_R_PI_0_PWM_0 327 @@ -539,6 +540,11 @@ #define IMX_SC_R_VPU_MU_3 538 #define IMX_SC_R_VPU_ENC_1 539 #define IMX_SC_R_VPU 540 -#define IMX_SC_R_LAST 541 +#define IMX_SC_R_DMA_5_CH0 541 +#define IMX_SC_R_DMA_5_CH1 542 +#define IMX_SC_R_DMA_5_CH2 543 +#define IMX_SC_R_DMA_5_CH3 544 +#define IMX_SC_R_ATTESTATION 545 +#define IMX_SC_R_LAST 546 =20 #endif /* __DT_BINDINGS_RSCRC_IMX_H */ --=20 2.7.4