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Wed, 27 Feb 2019 03:46:42 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Yy567eFidfxDK70YtUI0fD4kJQmgUXNVSv8cHNKZYL4=; b=AO6/+3ldjoUKZVu68lytL4tjpBDxWxbaI/HmAn3bPojUKZy5xIC/l2HqbXLQ1Ij30Dts3fCr01pjQlfofSW40oMdhL1Cxug3ir/HY8dqjaZRi6IZbTdndZCpJ2l5qj+6o2SxAJ5eu6pLEyyXanC/HFeVOWSn4iRk3o2exNs9S8o= Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com (52.134.72.18) by DB3PR0402MB3643.eurprd04.prod.outlook.com (52.134.66.153) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1643.16; Wed, 27 Feb 2019 08:46:22 +0000 Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::1cb4:3e1c:fc85:7ed7]) by DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::1cb4:3e1c:fc85:7ed7%2]) with mapi id 15.20.1643.019; Wed, 27 Feb 2019 08:46:22 +0000 From: Anson Huang To: "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "catalin.marinas@arm.com" , "will.deacon@arm.com" , "rui.zhang@intel.com" , "edubezval@gmail.com" , "daniel.lezcano@linaro.org" , Aisheng Dong , "ulf.hansson@linaro.org" , "sboyd@kernel.org" , Daniel Baluta , Andy Gross , "horms+renesas@verge.net.au" , "heiko@sntech.de" , "arnd@arndb.de" , "maxime.ripard@bootlin.com" , "bjorn.andersson@linaro.org" , "jagan@amarulasolutions.com" , "enric.balletbo@collabora.com" , "marc.w.gonzalez@free.fr" , "olof@lixom.net" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-pm@vger.kernel.org" CC: dl-linux-imx Subject: [PATCH V10 1/4] dt-bindings: fsl: scu: add thermal binding Thread-Topic: [PATCH V10 1/4] dt-bindings: fsl: scu: add thermal binding Thread-Index: AQHUznjp1VM2Vv0vQ0qLNAgNlgUeAQ== Date: Wed, 27 Feb 2019 08:46:21 +0000 Message-ID: <1551256894-21954-1-git-send-email-Anson.Huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK2PR0401CA0021.apcprd04.prod.outlook.com (2603:1096:202:2::31) To DB3PR0402MB3916.eurprd04.prod.outlook.com (2603:10a6:8:10::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; 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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: uY3AaHOC4d7Qt7W8lLtGAXFrKAM2LTaRw3wtTUysAq0sEEldOs0YFoYKoQAT/XNMaRqRZhfcp5Y6Uh++eSyn5+rpTFu/Ld7aH47yA4hOdqJLKyCF78ksp3b0fKaHw4FMYbKUGiJNVfYiO8xG6GWRTUdgO3j8wrc/WGJW12x8qgWn/toRSNyVND6yViipWeZA3URl5DD6CO8a+FwZbfQJH2GUnWhGncYwxtB6LZXFfAEfY0wWBfOEXwLFOB2wv75n+kyWGanGhTg6WcejjqlH+BntA6+7hjt2aLch0Ymy+ZS8bntKaYgKTC36b+yD4MYniWUFf8D1jQ4yiuodGtQfTXtpjxBU+ZTA7cSlunvPy+Xv8agM8g92oi+QLzHzmCDBDgSax3S7rtjEdCoChgR4mTnKmavr4kjD6Aq+emC+dOU= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 70a8abcb-8cca-4858-8ca7-08d69c900c52 X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Feb 2019 08:46:12.7871 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3643 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as system controller, the system controller is in charge of system power, clock and thermal sensors etc. management, Linux kernel has to communicate with system controller via MU (message unit) IPC to get temperature from thermal sensors, this patch adds binding doc for i.MX system controller thermal driver. Signed-off-by: Anson Huang --- Changes since V9: - change #thermal-sensor-cells value in example to 1, since there are othe= r thermal sensors inside system controller, it is just because there are s= till some issue, so system controller does NOT expose them for now, they coul= d be exposed later, so it should be 1 from HW perspective. --- .../devicetree/bindings/arm/freescale/fsl,scu.txt | 21 +++++++++++++++++= ++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/= Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt index 72d481c..855270b 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt @@ -122,6 +122,21 @@ RTC bindings based on SCU Message Protocol Required properties: - compatible: should be "fsl,imx8qxp-sc-rtc"; =20 +Thermal bindings based on SCU Message Protocol +------------------------------------------------------------ + +Required properties: +- compatible: Should be : + "fsl,imx8qxp-sc-thermal" + followed by "fsl,imx-sc-thermal"; + +- #thermal-sensor-cells: See Documentation/devicetree/bindings/thermal/the= rmal.txt + for a description. + +- imx,sensor-resource-id: A single integer for single thermal zone's reso= urce ID or + an array of integers to specify each thermal zone's sensor + resource ID. + Example (imx8qxp): ------------- lsio_mu1: mailbox@5d1c0000 { @@ -168,6 +183,12 @@ firmware { rtc: rtc { compatible =3D "fsl,imx8qxp-sc-rtc"; }; + + tsens: thermal-sensor { + compatible =3D "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal"; + #thermal-sensor-cells =3D <1>; + imx,sensor-resource-id =3D ; + }; }; }; =20 --=20 2.7.4