Received: by 2002:ac0:aed5:0:0:0:0:0 with SMTP id t21csp436111imb; Fri, 1 Mar 2019 04:51:23 -0800 (PST) X-Google-Smtp-Source: AHgI3IYZV3CDntHRUSh8dK3+GHJ/gcgI2nV+lnDrdNMQCkCDcl2ps+MzR1VVipF0h4WVDFEesDfp X-Received: by 2002:a62:cf02:: with SMTP id b2mr5360156pfg.71.1551444683426; Fri, 01 Mar 2019 04:51:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551444683; cv=none; d=google.com; s=arc-20160816; b=tVWushH3/CfxC9GM352P+ObmOr08fr1knFB522w4/44PalxReOPx/HttH7w4h1OfyQ 2jjMUUw1PM+M17m3lnbZUOiUat4C2r0lMi4C1TH+Qp+9NbzPZont/61IcFlHiXWQg+Fw UWZCJxPqAkczIvsqlgmmBy9cs5tpjOHmY7AZZRu06YHNgrUBKQFwiHKH00wgEeXJ+haK WZAK0RJLBylTg6RZP0ZLrOEFl4TKJ21CRMxfeTce8ta+hepRZEmPnBiRyaOkRlEhEfvq vN0AcGzkv0spMVhvF8KG4rAgda2FkXLlK5JyHCbYYM03dS6kRZML0VImGn8/Rb1Cl7jr Rl7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=GEioIw1MYjodRdFql+vsCA0/fElNrXAwuyT8mbW1i5E=; b=nhaT6YW5HIedIIjtuV9LCp/TeSBUYNphHJbBPGDZsp+KZ+MGWx3oCfztDotGxL34n8 T+GePM/ZIiaL26Yp8Ey3kMCvTcMMlujzOngK6J+XswETZCLC3UngE+3KEw1JCMs46koX IH+UqiVZR9cbWAl4kgIA8+/mKuSOz/FvN2UIjhA5PaoHApmKxoCc1HinAN7P5y1G6mgO tnbsP8WzRivGtfxlbrGs5A6RRTOtPRMLXtQdCU6hvRngY6fbj5kT+vTo1euS7i/n5Pwy aVczPGfexeJP5Un8t04JHwmTEG/rD6cmRbHEoxPkjJY0hzmTt6fIe7bHoIWo0LrksIZL LN2A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v1si19757015pgn.583.2019.03.01.04.51.07; Fri, 01 Mar 2019 04:51:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732630AbfCALad (ORCPT + 99 others); Fri, 1 Mar 2019 06:30:33 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:33444 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725978AbfCALad (ORCPT ); Fri, 1 Mar 2019 06:30:33 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1F9BEEBD; Fri, 1 Mar 2019 03:30:33 -0800 (PST) Received: from e107981-ln.cambridge.arm.com (e107981-ln.cambridge.arm.com [10.1.197.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0BCAD3F5C1; Fri, 1 Mar 2019 03:30:30 -0800 (PST) Date: Fri, 1 Mar 2019 11:30:26 +0000 From: Lorenzo Pieralisi To: honghui.zhang@mediatek.com Cc: bhelgaas@google.com, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ryder.lee@mediatek.com, rafael.j.wysocki@intel.com, fred@fredlawl.com, poza@codeaurora.org, youlin.pei@mediatek.com, jianjun.wang@mediatek.com Subject: Re: [PATCH v3 0/2] PCI: mediatek: enable whole MMIO range and enlarge the PCIe2AHB window size Message-ID: <20190301113026.GA17669@e107981-ln.cambridge.arm.com> References: <1548999367-11733-1-git-send-email-honghui.zhang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1548999367-11733-1-git-send-email-honghui.zhang@mediatek.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Feb 01, 2019 at 01:36:05PM +0800, honghui.zhang@mediatek.com wrote: > From: Honghui Zhang > > Two patches: > patch 1 enable whole MMIO range which also fix the complain of scripts/coccinelle/api/resource_size.cocci > patch 2 enlarge the PCIe2AHB window size to support fully access of 4GB DRAM from EP DMA. > > v3: > - update the changlog title for patch1 and update commit message following Bjorn's suggestion > - move the "|" into the previous line. > > v2: > - Fix the checkpatch complains for patch 1. > - update the commit message and change title of patch 1 for changelog conventions. > - Add patch 2. > > Honghui Zhang (2): > PCI: mediatek: Enable the whole memory mapped IO range > PCI: mediatek: Enlarge PCIe2AHB window size to support 4GB DRAM > > drivers/pci/controller/pcie-mediatek.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-) I have basically rewritten the commit logs and applied the patches to pci/mediatek for v5.1 (pending testing), please have a look. Lorenzo