Received: by 2002:ac0:aed5:0:0:0:0:0 with SMTP id t21csp485716imb; Fri, 1 Mar 2019 06:07:36 -0800 (PST) X-Google-Smtp-Source: APXvYqzmKEYDUH/cU9OS/AStAhe2w5WoCqsXlI/icVZTTmzfcbEngjW3vPWXrEcZod4Rty+livWO X-Received: by 2002:a17:902:7405:: with SMTP id g5mr5715317pll.230.1551449256801; Fri, 01 Mar 2019 06:07:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551449256; cv=none; d=google.com; s=arc-20160816; b=0xmsrA8nr/AAYTxrCdjjPBX1PfLm2DyaLFM60Y3pBOi+btywwjSVO9pVB70DZZ9/BA oqEZ7fsfdLx7r97AXszx4OtPT87i9Ug54k12kmzjBmwdoF55XwOYJG2pMgnC6ux7h/Yj QeoTJEyfT7aoQ1k4DuEVCtYMPZ3iT3bs1AQjWLSP2w43CJY/vXzr+6MYkz2XNfi69Bem 2zEVlOauUaeYjk25IWXxpVfFLO0UW5dlZwF72+Z6xzleIE0QxB+BZNzk+Drhmko5ke0F b41xDmQ2fHyYfKBZ9Xgo/ii89iwzEjRtSRVpdoQJMeHRsV2LdkD/TZS8viBcZTWy+Eog sJpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=ntGVwuHiJI3xry2GRxBRRPnImuagP6EBEsTVhIfpG4w=; b=VwcuGFoZM0C6OYi/bYH8hyJCyQLry6zqzvTxHCisU+EbZCJi0Jq8dGFR2dtpeyQlSO TXs5YxkXYFoQMfscTjQnDFDOwyokm2jvO7rserRwbj1H9Ht8OO6gL8eDwcVoKV6zAE6K t2s0qLo8TwMn20mswBFZTkdqlN+Ij5hz5lOnuMNmMChmJNAJSE6maOFLRNBFLlKAZfF2 riiAW6qKfMei0o4GXJ2i6vFTGZ9QrHKRPNijvtPg9fyViEA4n4d7nJpxkPXDcFkCA8Ww NQoX6uLI3EZS2XtSaepEzzPZK5QPN83zby6as0+C2uBouPmF+rhPC7R0L0hdO2Ab/Otz RQww== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o12si19276846pgv.318.2019.03.01.06.07.20; Fri, 01 Mar 2019 06:07:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388441AbfCAOEW (ORCPT + 99 others); Fri, 1 Mar 2019 09:04:22 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:35668 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733126AbfCAOET (ORCPT ); Fri, 1 Mar 2019 09:04:19 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 55C6A16A3; Fri, 1 Mar 2019 06:04:19 -0800 (PST) Received: from fuggles.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 11A513F720; Fri, 1 Mar 2019 06:04:15 -0800 (PST) From: Will Deacon To: linux-arch@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Will Deacon , "Paul E. McKenney" , Benjamin Herrenschmidt , Michael Ellerman , Arnd Bergmann , Peter Zijlstra , Andrea Parri , Palmer Dabbelt , Daniel Lustig , David Howells , Alan Stern , Linus Torvalds , "Maciej W. Rozycki" , Paul Burton , Ingo Molnar , Yoshinori Sato , Rich Felker , Tony Luck Subject: [PATCH 05/20] arm64/io: Remove useless definition of mmiowb() Date: Fri, 1 Mar 2019 14:03:33 +0000 Message-Id: <20190301140348.25175-6-will.deacon@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190301140348.25175-1-will.deacon@arm.com> References: <20190301140348.25175-1-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org arm64 includes asm-generic/io.h, which provides a dummy definition of mmiowb() if one isn't already provided by the architecture. Remove the useless definition. Signed-off-by: Will Deacon --- arch/arm64/include/asm/io.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 8bb7210ac286..b807cb9b517d 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -124,8 +124,6 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) #define __io_par(v) __iormb(v) #define __iowmb() wmb() -#define mmiowb() do { } while (0) - /* * Relaxed I/O memory access primitives. These follow the Device memory * ordering rules but do not guarantee any ordering relative to Normal memory -- 2.11.0