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Date:   Fri, 1 Mar 2019 17:42:49 +0100
From:   Andreas Kemnade <andreas@kemnade.info>
To:     Maxime Ripard <maxime.ripard@bootlin.com>
Cc:     robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ARM: sun8i: h3: bluetooth for Banana Pi M2 Zero board
Message-ID: <20190301174249.59cd960d@aktux>
In-Reply-To: <20190301143632.kzlr4jphq3rceos6@flea>
References: <20190228212840.24964-1-andreas@kemnade.info>
        <20190301143632.kzlr4jphq3rceos6@flea>
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On Fri, 1 Mar 2019 15:36:32 +0100
Maxime Ripard <maxime.ripard@bootlin.com> wrote:

> Hi,
>=20
> Thanks for your patch
>=20
> On Thu, Feb 28, 2019 at 10:28:40PM +0100, Andreas Kemnade wrote:
> > The Banana Pi M2 Zero board has an AP6212 BT+Wifi combo chip
> > with broadcom internals attached to UART1 and some gpios.
> > This addition is in line with similar boards
> >=20
> > Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
> > ---
> >  .../boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts    | 29 ++++++++++++++=
++++++++
> >  1 file changed, 29 insertions(+)
> >=20
> > diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arc=
h/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
> > index 1db2541135a7..39e206fac4e3 100644
> > --- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
> > +++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
> > @@ -69,6 +69,8 @@
> >  		compatible =3D "mmc-pwrseq-simple";
> >  		pinctrl-names =3D "default";
> >  		reset-gpios =3D <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> > +		clocks =3D <&rtc 1>;
> > +		clock-names =3D "ext_clock";
> >  	};
> >  };
> > =20
> > @@ -122,7 +124,34 @@
> >  &uart1 {
> >  	pinctrl-names =3D "default";
> >  	pinctrl-0 =3D <&uart1_pins>, <&uart1_rts_cts_pins>;
> > +	uart-has-rtscts;
> >  	status =3D "okay";
> > +
> > +	bluetooth {
> > +		compatible =3D "brcm,bcm43438-bt";
> > +		pinctrl-names =3D "default";
> > +		pinctrl-0 =3D <&bt_pins_out>, <&bt_pins_in>;
> > +		clocks =3D <&rtc 1>;
> > +		clock-names =3D "lpo";
> > +		vbat-supply =3D <&reg_vcc3v3>;
> > +		vddio-supply =3D <&reg_vcc3v3>;
> > +		device-wakeup-gpios =3D <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
> > +		host-wakeup-gpios =3D <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
> > +		shutdown-gpios =3D <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
> > +	};
> > +
> > +};
> > +
> > +&pio {
> > +	bt_pins_out: bt_out {
> > +		pins =3D "PG12", "PG13";
> > +		function =3D "gpio_out";
> > +	};
> > +
> > +	bt_pins_in: bt_in {
> > +		pins =3D "PG11";
> > +		function =3D "gpio_in";
> > +	}; =20
>=20
> You don't need any of those pinctrl nodes, GPIOs work fine without.
>=20
ok, that makes things easier. I will resend a v2 without them.

Regards,
Andreas

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