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[209.132.180.67]) by mx.google.com with ESMTP id 5si9838924pgb.585.2019.03.01.10.32.48; Fri, 01 Mar 2019 10:33:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388692AbfCASUV convert rfc822-to-8bit (ORCPT + 99 others); Fri, 1 Mar 2019 13:20:21 -0500 Received: from vegas.theobroma-systems.com ([144.76.126.164]:56609 "EHLO mail.theobroma-systems.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727679AbfCASUU (ORCPT ); Fri, 1 Mar 2019 13:20:20 -0500 Received: from ip092042140082.rev.nessus.at ([92.42.140.82]:56646 helo=[10.2.146.249]) by mail.theobroma-systems.com with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1gzmlM-0007Dw-E4; Fri, 01 Mar 2019 19:20:00 +0100 Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 11.5 \(3445.9.1\)) Subject: Re: [PATCH 1/3] dt-bindings: mmc: Add DTS property to disable DCMDs on Arasan controllers From: =?utf-8?Q?Christoph_M=C3=BCllner?= In-Reply-To: <9535423.1mel94qINy@phil> Date: Fri, 1 Mar 2019 19:19:59 +0100 Cc: robh+dt@kernel.org, mark.rutland@arm.com, shawn.lin@rock-chips.com, ulf.hansson@linaro.org, adrian.hunter@intel.com, Philipp Tomsich , Michal Simek , Douglas Anderson , Enric Balletbo i Serra , Viresh Kumar , Jeffy Chen , Shunqian Zheng , Ezequiel Garcia , Randy Li , Tony Xie , Vicente Bergas , Klaus Goger , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Content-Transfer-Encoding: 8BIT Message-Id: References: <20190301164349.60589-1-christoph.muellner@theobroma-systems.com> <9535423.1mel94qINy@phil> To: Heiko Stuebner X-Mailer: Apple Mail (2.3445.9.1) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On 01.03.2019, at 19:17, Heiko Stuebner wrote: > > Am Freitag, 1. März 2019, 17:43:45 CET schrieb Christoph Muellner: >> Direct commands (DCMDs) are an optional feature of eMMC 5.1's command >> queue engine (CQE). The Arasan eMMC 5.1 controller uses the CQHCI, >> which exposes a control register bit to enable the feature. >> The current implementation sets this bit unconditionally. >> >> This patch allows to surpress the feature activation, >> by specifying the property disable-cqe-dcmd. >> >> Signed-off-by: Christoph Muellner >> Signed-off-by: Philipp Tomsich > > Patch subject is needs improvement :-) . > I did scratch my head a lot regarding "where is the code change" > until I actually looked into the patch itself, so you probably want > > mmc: sdhci-of-arasan: Add DTS property to disable DCMDs > > or similar instead of "dt-bindings: ..." here to match the subsystem. Yes, I've spotted this as well after sending it. I've already renamed to "mmc: sdhci-of-arasan: Add DTS property to disable DCMDs." for v2. Thanks, Christoph > > > Heiko > >> --- >> drivers/mmc/host/sdhci-of-arasan.c | 5 ++++- >> 1 file changed, 4 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c >> index c9e3e050ccc8..88dc3f00a5be 100644 >> --- a/drivers/mmc/host/sdhci-of-arasan.c >> +++ b/drivers/mmc/host/sdhci-of-arasan.c >> @@ -832,7 +832,10 @@ static int sdhci_arasan_probe(struct platform_device *pdev) >> host->mmc_host_ops.start_signal_voltage_switch = >> sdhci_arasan_voltage_switch; >> sdhci_arasan->has_cqe = true; >> - host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD; >> + host->mmc->caps2 |= MMC_CAP2_CQE; >> + >> + if (!of_property_read_bool(np, "disable-cqe-dcmd")) >> + host->mmc->caps2 |= MMC_CAP2_CQE_DCMD; >> } >> >> ret = sdhci_arasan_add_host(sdhci_arasan); >> > > > >