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Subject: Re: [PATCH v4 15/17] kvm: x86: Report CORE_CAPABILITY on
 GET_SUPPORTED_CPUID
To:     Xiaoyao Li <xiaoyao.li@linux.intel.com>,
        Fenghua Yu <fenghua.yu@intel.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        H Peter Anvin <hpa@zytor.com>,
        Dave Hansen <dave.hansen@intel.com>,
        Ashok Raj <ashok.raj@intel.com>,
        Peter Zijlstra <peterz@infradead.org>,
        Ravi V Shankar <ravi.v.shankar@intel.com>
Cc:     linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>,
        kvm@vger.kernel.org
References: <1551494711-213533-1-git-send-email-fenghua.yu@intel.com>
 <1551494711-213533-16-git-send-email-fenghua.yu@intel.com>
 <697ee0bd-a5f6-7712-017e-455eed5bc185@redhat.com>
 <f5053983dc12550edabc418b0493c6ec8deb1412.camel@linux.intel.com>
From:   Paolo Bonzini <pbonzini@redhat.com>
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Message-ID: <79b659fb-1c16-463d-aa74-f1b3d8a9db5d@redhat.com>
Date:   Mon, 4 Mar 2019 11:49:11 +0100
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On 04/03/19 11:47, Xiaoyao Li wrote:
> On Mon, 2019-03-04 at 09:38 +0100, Paolo Bonzini wrote:
>> On 02/03/19 03:45, Fenghua Yu wrote:
>>> From: Xiaoyao Li <xiaoyao.li@linux.intel.com>
>>>
>>> In the latest Intel SDM, CPUID.(EAX=7H,ECX=0):EDX[30] will enumerate
>>> the presence of the IA32_CORE_CAPABILITY MSR.
>>>
>>> Update GET_SUPPORTED_CPUID to expose this feature bit to user space, so
>>> that user space know this bit can be enabled in CPUID.
>>>
>>> Signed-off-by: Xiaoyao Li <xiaoyao.li@linux.intel.com>
>>> ---
>>>  arch/x86/kvm/cpuid.c | 3 ++-
>>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>>> index c07958b59f50..e0e17b9c65da 100644
>>> --- a/arch/x86/kvm/cpuid.c
>>> +++ b/arch/x86/kvm/cpuid.c
>>> @@ -410,7 +410,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2
>>> *entry, u32 function,
>>>  	/* cpuid 7.0.edx*/
>>>  	const u32 kvm_cpuid_7_0_edx_x86_features =
>>>  		F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
>>> -		F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP);
>>> +		F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(CORE_CAPABILITY) |
>>> +		F(INTEL_STIBP);
>>
>> This should be enabled always if boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT),
>> since the MSR is emulated.  This way, guests can always rely on
>> IA32_CORE_CAPABILITY_MSR and it won't have to rely on the FMS
>> (which means nothing inside a guest).
>>
>> Paolo
> 
> Hi, Paolo
> Do you mean that we don't need this here, but to add the handling below?
> 
> static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 * entry, u32 function,
> ...
> 	switch (function) {
> 	...
> 	case 7: {
> 		...
> 		if (index ==0) {
> 			...
> 			if(boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
> 				entry->edx |= F(CORE_CAPABILITY);
> 		}
> 		...
> 	...
> 	}
> ...
> }

Yes, exactly.

Paolo

>>>  	/* all calls to cpuid_count() should be made on the same cpu */
>>>  	get_cpu();
>>>
>>
>>
>