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[209.132.180.67]) by mx.google.com with ESMTP id k16si7239859pfj.174.2019.03.04.20.50.35; Mon, 04 Mar 2019 20:50:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=Jq19CoHM; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727187AbfCEEuF (ORCPT + 99 others); Mon, 4 Mar 2019 23:50:05 -0500 Received: from mail-pf1-f195.google.com ([209.85.210.195]:38583 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727006AbfCEEtt (ORCPT ); Mon, 4 Mar 2019 23:49:49 -0500 Received: by mail-pf1-f195.google.com with SMTP id n125so4703371pfn.5 for ; Mon, 04 Mar 2019 20:49:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WrWa1I1KlS8O2M5oWvlBrE0dGk9UBUElSbe4mXouqcQ=; b=Jq19CoHMlSEmGOgfXTJSaz1flGHi6N50sqGo7PIDHDRoGZ68zEJfMhw9nYvM6RWcRX VRy+4rAjQXlHd63YnL18K5KvqCSAILA2ae0Exe6q4dA+WRqego50j/8h0LqoW3CFwluX 9Prt7O19nyKUjf7ofAUR4Hqb9wbxV5PtYm4PA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WrWa1I1KlS8O2M5oWvlBrE0dGk9UBUElSbe4mXouqcQ=; b=lffQbEPFFsvfS4eI/SHkRZAqlZNbNDcD9e6USTcnjK5yWQISwJgMoTlitG+SmGsTTE VbLBNMuHWqAMpB0RyMBViXx7FyTIZ/CeYhE1oPI4nqmh7+7A1oCVnRnQscdI3wshmfNm dT8Ssmls6iE3GXRPMXtSgJS7JxZt3UZjAPUj1bQPcm/W501adOiGAJ1x8LjJhp0nDurE 9cwpDV4BTq9cIXsx7R3IQ3E8Z4VmWcjYl8ZKHK0FOAOK5tQ0ireSj3sWWj6f0fphNvzP j/A/yZWIm2yPcfbYEh0EYv42hvmwGSonFKGnTRLTwQTE0BJ3eoq6xjKAnQVqWNrfpHHJ +fIw== X-Gm-Message-State: APjAAAWry0nFK/s1oXP1JEeSTubBHIo775X52aUAD0qIxsD5Lq7TAU8k jFMGCGGG8hJv8BOnUDz2Y7TmNBGYUHI= X-Received: by 2002:a62:2b88:: with SMTP id r130mr23596219pfr.93.1551761388046; Mon, 04 Mar 2019 20:49:48 -0800 (PST) Received: from exogeni.mtv.corp.google.com ([2620:15c:202:1:db8d:8e3f:2514:5db8]) by smtp.gmail.com with ESMTPSA id z15sm15893883pgc.25.2019.03.04.20.49.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Mar 2019 20:49:47 -0800 (PST) From: Derek Basehore To: linux-kernel@vger.kernel.org Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-doc@vger.kernel.org, sboyd@kernel.org, mturquette@baylibre.com, heiko@sntech.de, aisheng.dong@nxp.com, mchehab+samsung@kernel.org, corbet@lwn.net, jbrunet@baylibre.com, Derek Basehore Subject: [PATCH v2 5/6] docs: driver-api: add pre_rate_req to clk documentation Date: Mon, 4 Mar 2019 20:49:35 -0800 Message-Id: <20190305044936.22267-6-dbasehore@chromium.org> X-Mailer: git-send-email 2.21.0.352.gf09ad66450-goog In-Reply-To: <20190305044936.22267-1-dbasehore@chromium.org> References: <20190305044936.22267-1-dbasehore@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds documentation for the new clk op pre_rate_req. Signed-off-by: Derek Basehore --- Documentation/driver-api/clk.rst | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/driver-api/clk.rst b/Documentation/driver-api/clk.rst index 593cca5058b1..917f6ac29645 100644 --- a/Documentation/driver-api/clk.rst +++ b/Documentation/driver-api/clk.rst @@ -82,6 +82,9 @@ the operations defined in clk-provider.h:: unsigned long *parent_rate); int (*determine_rate)(struct clk_hw *hw, struct clk_rate_request *req); + int (*pre_rate_req)(struct clk_hw *hw, + const struct clk_rate_request *next, + struct clk_rate_request *pre); int (*set_parent)(struct clk_hw *hw, u8 index); u8 (*get_parent)(struct clk_hw *hw); int (*set_rate)(struct clk_hw *hw, @@ -224,6 +227,8 @@ optional or must be evaluated on a case-by-case basis. +----------------+------+-------------+---------------+-------------+------+ |.determine_rate | | y [1]_ | | | | +----------------+------+-------------+---------------+-------------+------+ + |.pre_rate_req | | y [1]_ | | | | + +----------------+------+-------------+---------------+-------------+------+ |.set_rate | | y | | | | +----------------+------+-------------+---------------+-------------+------+ +----------------+------+-------------+---------------+-------------+------+ @@ -238,7 +243,7 @@ optional or must be evaluated on a case-by-case basis. |.init | | | | | | +----------------+------+-------------+---------------+-------------+------+ -.. [1] either one of round_rate or determine_rate is required. +.. [1] one of round_rate, determine_rate, or pre_rate_req is required. Finally, register your clock at run-time with a hardware-specific registration function. This function simply populates struct clk_foo's -- 2.21.0.352.gf09ad66450-goog