Received: by 2002:ac0:aed5:0:0:0:0:0 with SMTP id t21csp3953252imb; Wed, 6 Mar 2019 01:27:29 -0800 (PST) X-Google-Smtp-Source: APXvYqwCBA03p1uK/J/W/aC8lA8H1IeydMk54o6liDYhyUPdo4mcZYfah1shFvpL3Jwi/nzR7CVX X-Received: by 2002:a62:168a:: with SMTP id 132mr6332377pfw.155.1551864449092; Wed, 06 Mar 2019 01:27:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1551864449; cv=none; d=google.com; s=arc-20160816; b=ciG0Fnzrm8DobPIJfzqdHHiq3+4aNI7rk/vFJDfuLK8QFNcyRjO5BgqHkcquy2d4jW IlRWyRhB+PSodgPkpad6IVzAUaDn4pnvcUS4nW/+zgg0FSnxbMYQqLOIsD8v8JTTWFw+ q8NAPdwuJPwuOwOAUQvyExZ7lY5K8CTQczcMZ6Dd/YP7Cs5s52gtKuC03jdIdEp2YplC P2GYKIF1T1iVLaEieTwpIxV9qcYZASqLb3zTJ8PV7A0tqwC+ygzowmZBQDcOdhj/Ujup Jiuj1IMCVcmGUMEienGNa1g0INcBkyfDO3LsOxk59KvPKyX1cqaKSt9/LjvuhgUVaSfa 89Wg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=LTD2Wj0bjhKY3veCFBk/H+Od0kgu59QxWGEc6io8FMo=; b=Jso5J2h+yJ0ArzJ2cpbllkx5GhmexQNWvq70/rjghgqVg6VzgTvw2qExzQiwCj9XB7 Kc6SmBpoNM/TIDJPzh7lzesVwgqKrt7fk6Po1WAKJCn5+Agbuf4hvSyHHiYEs3em5cMh ZJZzho54UQr4KOmPnK8kiDrUOG2faHcyj/Oddcaze5jdoQQk+yNl9nxJAmbYSDw9w8hl c2jh9ZX+6zNdQ6pAkBeD6A88NdVtBv1Emsi7pBDH2XLepHnoDNza1KnoJVo3Z1qa+qqi uIH1cpghB4sfe9qnuEECwSubkRhFVzb2pMLcmS6n23j7NEqqjEXA+6gnNFuhBO1psm4F 8L3g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x14si1023197pgh.98.2019.03.06.01.27.13; Wed, 06 Mar 2019 01:27:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729667AbfCFI44 (ORCPT + 99 others); Wed, 6 Mar 2019 03:56:56 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:27460 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729561AbfCFI4X (ORCPT ); Wed, 6 Mar 2019 03:56:23 -0500 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x268sqWU015101; Wed, 6 Mar 2019 09:55:50 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2qyhgaxr3b-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 06 Mar 2019 09:55:50 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id AD89634; Wed, 6 Mar 2019 08:55:49 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7FCA62407; Wed, 6 Mar 2019 08:55:49 +0000 (GMT) Received: from localhost (10.75.127.45) by SFHDAG5NODE3.st.com (10.75.127.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 6 Mar 2019 09:55:48 +0100 From: Fabrice Gasnier To: CC: , , , , , , , , , , , Subject: [PATCH 3/8] iio: adc: stm32-dfsdm: move dma enable from start_conv() to start_dma() Date: Wed, 6 Mar 2019 09:55:19 +0100 Message-ID: <1551862524-25098-4-git-send-email-fabrice.gasnier@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551862524-25098-1-git-send-email-fabrice.gasnier@st.com> References: <1551862524-25098-1-git-send-email-fabrice.gasnier@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG3NODE1.st.com (10.75.127.7) To SFHDAG5NODE3.st.com (10.75.127.15) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-03-06_04:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Move DMA enable (e.g. set RDMAEN bit) away from start_conv() that is used for both buffer and single conversions. Thus, single conv rely on interrupt, not dma. Note: take care to prepare all DMA stuff and set RDMAEN before starting filter (can be set only when DFEN=0). This is precursor patch to ease support of triggered buffer mode. Signed-off-by: Fabrice Gasnier --- drivers/iio/adc/stm32-dfsdm-adc.c | 77 +++++++++++++++++++-------------------- 1 file changed, 38 insertions(+), 39 deletions(-) diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c index 8690672..818627f 100644 --- a/drivers/iio/adc/stm32-dfsdm-adc.c +++ b/drivers/iio/adc/stm32-dfsdm-adc.c @@ -429,12 +429,10 @@ static ssize_t dfsdm_adc_audio_set_spiclk(struct iio_dev *indio_dev, } static int stm32_dfsdm_start_conv(struct stm32_dfsdm_adc *adc, - const struct iio_chan_spec *chan, - bool dma) + const struct iio_chan_spec *chan) { struct regmap *regmap = adc->dfsdm->regmap; int ret; - unsigned int dma_en = 0; ret = stm32_dfsdm_start_channel(adc->dfsdm, chan->channel); if (ret < 0) @@ -444,25 +442,12 @@ static int stm32_dfsdm_start_conv(struct stm32_dfsdm_adc *adc, if (ret < 0) goto stop_channels; - if (dma) { - /* Enable DMA transfer*/ - dma_en = DFSDM_CR1_RDMAEN(1); - } - /* Enable DMA transfer*/ - ret = regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id), - DFSDM_CR1_RDMAEN_MASK, dma_en); - if (ret < 0) - goto filter_unconfigure; - ret = stm32_dfsdm_start_filter(adc->dfsdm, adc->fl_id); if (ret < 0) - goto stop_dma; + goto filter_unconfigure; return 0; -stop_dma: - regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id), - DFSDM_CR1_RDMAEN_MASK, 0); filter_unconfigure: regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id), DFSDM_CR1_CFG_MASK, 0); @@ -479,10 +464,6 @@ static void stm32_dfsdm_stop_conv(struct stm32_dfsdm_adc *adc, stm32_dfsdm_stop_filter(adc->dfsdm, adc->fl_id); - /* Clean conversion options */ - regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id), - DFSDM_CR1_RDMAEN_MASK, 0); - regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id), DFSDM_CR1_CFG_MASK, 0); @@ -599,15 +580,36 @@ static int stm32_dfsdm_adc_dma_start(struct iio_dev *indio_dev) cookie = dmaengine_submit(desc); ret = dma_submit_error(cookie); - if (ret) { - dmaengine_terminate_all(adc->dma_chan); - return ret; - } + if (ret) + goto err_stop_dma; /* Issue pending DMA requests */ dma_async_issue_pending(adc->dma_chan); + /* Enable DMA transfer*/ + ret = regmap_update_bits(adc->dfsdm->regmap, DFSDM_CR1(adc->fl_id), + DFSDM_CR1_RDMAEN_MASK, DFSDM_CR1_RDMAEN_MASK); + if (ret < 0) + goto err_stop_dma; + return 0; + +err_stop_dma: + dmaengine_terminate_all(adc->dma_chan); + + return ret; +} + +static void stm32_dfsdm_adc_dma_stop(struct iio_dev *indio_dev) +{ + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); + + if (!adc->dma_chan) + return; + + regmap_update_bits(adc->dfsdm->regmap, DFSDM_CR1(adc->fl_id), + DFSDM_CR1_RDMAEN_MASK, 0); + dmaengine_terminate_all(adc->dma_chan); } static int stm32_dfsdm_postenable(struct iio_dev *indio_dev) @@ -623,24 +625,22 @@ static int stm32_dfsdm_postenable(struct iio_dev *indio_dev) if (ret < 0) return ret; - ret = stm32_dfsdm_start_conv(adc, chan, true); + ret = stm32_dfsdm_adc_dma_start(indio_dev); if (ret) { - dev_err(&indio_dev->dev, "Can't start conversion\n"); + dev_err(&indio_dev->dev, "Can't start DMA\n"); goto stop_dfsdm; } - if (adc->dma_chan) { - ret = stm32_dfsdm_adc_dma_start(indio_dev); - if (ret) { - dev_err(&indio_dev->dev, "Can't start DMA\n"); - goto err_stop_conv; - } + ret = stm32_dfsdm_start_conv(adc, chan); + if (ret) { + dev_err(&indio_dev->dev, "Can't start conversion\n"); + goto err_stop_dma; } return 0; -err_stop_conv: - stm32_dfsdm_stop_conv(adc, chan); +err_stop_dma: + stm32_dfsdm_adc_dma_stop(indio_dev); stop_dfsdm: stm32_dfsdm_stop_dfsdm(adc->dfsdm); @@ -652,11 +652,10 @@ static int stm32_dfsdm_predisable(struct iio_dev *indio_dev) struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); const struct iio_chan_spec *chan = &indio_dev->channels[0]; - if (adc->dma_chan) - dmaengine_terminate_all(adc->dma_chan); - stm32_dfsdm_stop_conv(adc, chan); + stm32_dfsdm_adc_dma_stop(indio_dev); + stm32_dfsdm_stop_dfsdm(adc->dfsdm); return 0; @@ -736,7 +735,7 @@ static int stm32_dfsdm_single_conv(struct iio_dev *indio_dev, if (ret < 0) goto stop_dfsdm; - ret = stm32_dfsdm_start_conv(adc, chan, false); + ret = stm32_dfsdm_start_conv(adc, chan); if (ret < 0) { regmap_update_bits(adc->dfsdm->regmap, DFSDM_CR2(adc->fl_id), DFSDM_CR2_REOCIE_MASK, DFSDM_CR2_REOCIE(0)); -- 2.7.4