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From:   Aisheng Dong <aisheng.dong@nxp.com>
To:     BOUGH CHEN <haibo.chen@nxp.com>, Stefan Agner <stefan@agner.ch>
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Subject: RE: [PATCH] Document: dt: binding: imx: Fix PAD_CTL_DSE_X*
Thread-Topic: [PATCH] Document: dt: binding: imx: Fix PAD_CTL_DSE_X*
Thread-Index: AQHUytCIfTFXSadJckWCjEy0gWR0oKXyA8SQgAATHICAClra8IACAHHAgAA7I0A=
Date:   Wed, 6 Mar 2019 13:36:42 +0000
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[...]

> > > Btw, I saw that imx7d-sdb.dts (and probably other i.MX 7 boards too)
> > > use three different settings for usdhc pinctrl: 0x59, 0x5a and 0x5b
> > > (for default, 100MHz and 200MHz respectively). One would expect that
> > > higher frequency use higher driver strength (and this is the case for=
 i.MX 6).
> > > But with this new/corrected pad values this means we use x4, x2 and
> > > x6 for default, 100MHz and 200MHz respectively. This hardly seems rig=
ht..?
> > > Probably needs fixing too?
> > >
> >
> > Yes, that's true.
> > Especially 100Mhz setting should be updated.
> >
> > Haibo,
> > Can you please help double check if X2 for 50Mhz and X4 for 100Mhz can
> > work stably on MX7D SDB?
> > If yes, we'd like to update the pad setting according to new RM version=
.
> >
>=20
> X2 for high speed and x4 for ddr50/ddr52 can work stable on MX7D SDB.
> I think all the 7D related dts need to fix this. Not sure whether 7S need=
 this fix,
> can you confirm?
>=20

Yes, please make a patch to test board maintainer.

Regards
Dong Aisheng

> Best Regards
> Haibo Chen