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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: M20fCWo0KwCgWpO1ibB5VLtE1yVb7MrLDJL0hPNHQsYanAWXNUAdJ0jOIolfAIxjMUQ/jNVUumwGhiQ5p1KKaVFYOcnJTVTeHXmlQbbQi9iEgMB+LZC3FBqUCuG+eZ6VQt39ay86RT7NsfWj9+hs1E7W82xrkZ65pU6ZUno9M+JXlQ3hVQzh8075T/Jeg+qcPy80kXcXvkn+0ZmsDxu++KAULqUYw32qwJZaKpA8aJ1hACymKaRP82AQ7jymQ4HZHpyHpUe1o6D9EjkNa56J8FMrmbVfckvd8f4p1Bn22hMp9dT22cDXasLUClU5JC0w9eGa7RzMq6OxCD0kkORhPWAUXKebKjpkyG2uWsyOQLmtUQrPqLDpRpXVU8h+xVzEYgiVxnU0DbbiWnXostRy7CT329Aem6rORwuX3JQPx2w= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: ac26b464-f9b0-43b2-d1b0-08d6a3016dd6 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Mar 2019 13:33:05.1913 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6611 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > From: Anson Huang > Sent: Wednesday, March 6, 2019 9:06 AM >=20 > i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller inside, > the system controller is in charge of controlling power, clock and watchd= og > etc.. >=20 > This patch adds i.MX system controller watchdog driver support, watchdog > operation needs to be done in secure EL3 mode via ARM-Trusted-Firmware, > using SMC call, CPU will trap into ARM-Trusted-Firmware and then it will > request system controller to do watchdog operation via IPC. >=20 > Signed-off-by: Anson Huang > --- > Changes since V6: > - use module_platform_driver() instead of module_init/exit to make code > simple. > --- > drivers/watchdog/Kconfig | 14 ++++ > drivers/watchdog/Makefile | 1 + > drivers/watchdog/imx_sc_wdt.c | 174 > ++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 189 insertions(+) > create mode 100644 drivers/watchdog/imx_sc_wdt.c >=20 > diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index > 242eea8..33a6523 100644 > --- a/drivers/watchdog/Kconfig > +++ b/drivers/watchdog/Kconfig > @@ -641,6 +641,20 @@ config IMX2_WDT > To compile this driver as a module, choose M here: the > module will be called imx2_wdt. >=20 > +config IMX_SC_WDT > + tristate "IMX SC Watchdog" > + depends on IMX_SCU As I replied in another mail, it actually does not depend on SCU. Let's wait for Rob's comment on whether we could move watchdog Out of SCU node. > + depends on HAVE_ARM_SMCCC > + select WATCHDOG_CORE > + help > + This is the driver for the system controller watchdog > + on the NXP i.MX SoCs with system controller inside. > + If you have one of these processors and wish to have > + watchdog support enabled, say Y, otherwise say N. > + Nitpick: If resend, please also add description here that we need to use ARM SMC call as your commit message. Regards Dong Aisheng > + To compile this driver as a module, choose M here: the > + module will be called imx_sc_wdt. > + > config UX500_WATCHDOG > tristate "ST-Ericsson Ux500 watchdog" > depends on MFD_DB8500_PRCMU > diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index > ba930e4..136d9f0 100644 > --- a/drivers/watchdog/Makefile > +++ b/drivers/watchdog/Makefile > @@ -68,6 +68,7 @@ obj-$(CONFIG_NUC900_WATCHDOG) +=3D nuc900_wdt.o > obj-$(CONFIG_TS4800_WATCHDOG) +=3D ts4800_wdt.o > obj-$(CONFIG_TS72XX_WATCHDOG) +=3D ts72xx_wdt.o > obj-$(CONFIG_IMX2_WDT) +=3D imx2_wdt.o > +obj-$(CONFIG_IMX_SC_WDT) +=3D imx_sc_wdt.o > obj-$(CONFIG_UX500_WATCHDOG) +=3D ux500_wdt.o > obj-$(CONFIG_RETU_WATCHDOG) +=3D retu_wdt.o > obj-$(CONFIG_BCM2835_WDT) +=3D bcm2835_wdt.o diff --git > a/drivers/watchdog/imx_sc_wdt.c b/drivers/watchdog/imx_sc_wdt.c new file > mode 100644 index 0000000..ee48709 > --- /dev/null > +++ b/drivers/watchdog/imx_sc_wdt.c > @@ -0,0 +1,174 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright 2018-2019 NXP. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define DEFAULT_TIMEOUT 60 > +/* > + * Software timer tick implemented in scfw side, support 10ms to > +0xffffffff ms > + * in theory, but for normal case, 1s~128s is enough, you can change > +this max > + * value in case it's not enough. > + */ > +#define MAX_TIMEOUT 128 > + > +#define IMX_SIP_TIMER 0xC2000002 > +#define IMX_SIP_TIMER_START_WDOG 0x01 > +#define IMX_SIP_TIMER_STOP_WDOG 0x02 > +#define IMX_SIP_TIMER_SET_WDOG_ACT 0x03 > +#define IMX_SIP_TIMER_PING_WDOG 0x04 > +#define IMX_SIP_TIMER_SET_TIMEOUT_WDOG 0x05 > +#define IMX_SIP_TIMER_GET_WDOG_STAT 0x06 > +#define IMX_SIP_TIMER_SET_PRETIME_WDOG 0x07 > + > +#define SC_TIMER_WDOG_ACTION_PARTITION 0 > + > +static bool nowayout =3D WATCHDOG_NOWAYOUT; module_param(nowayout, > bool, > +0000); MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once > +started (default=3D" > + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); > + > +static unsigned int timeout =3D DEFAULT_TIMEOUT;=20 > module_param(timeout, > +uint, 0000); MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds > +(default=3D" > + __MODULE_STRING(DEFAULT_TIMEOUT) ")"); > + > +static int imx_sc_wdt_ping(struct watchdog_device *wdog) { > + struct arm_smccc_res res; > + > + arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_PING_WDOG, > + 0, 0, 0, 0, 0, 0, &res); > + > + return 0; > +} > + > +static int imx_sc_wdt_start(struct watchdog_device *wdog) { > + struct arm_smccc_res res; > + > + arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_START_WDOG, > + 0, 0, 0, 0, 0, 0, &res); > + if (res.a0) > + return -EACCES; > + > + arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_SET_WDOG_ACT, > + SC_TIMER_WDOG_ACTION_PARTITION, > + 0, 0, 0, 0, 0, &res); > + return res.a0 ? -EACCES : 0; > +} > + > +static int imx_sc_wdt_stop(struct watchdog_device *wdog) { > + struct arm_smccc_res res; > + > + arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_STOP_WDOG, > + 0, 0, 0, 0, 0, 0, &res); > + > + return res.a0 ? -EACCES : 0; > +} > + > +static int imx_sc_wdt_set_timeout(struct watchdog_device *wdog, > + unsigned int timeout) > +{ > + struct arm_smccc_res res; > + > + wdog->timeout =3D timeout; > + arm_smccc_smc(IMX_SIP_TIMER, IMX_SIP_TIMER_SET_TIMEOUT_WDOG, > + timeout * 1000, 0, 0, 0, 0, 0, &res); > + > + return res.a0 ? -EACCES : 0; > +} > + > +static const struct watchdog_ops imx_sc_wdt_ops =3D { > + .owner =3D THIS_MODULE, > + .start =3D imx_sc_wdt_start, > + .stop =3D imx_sc_wdt_stop, > + .ping =3D imx_sc_wdt_ping, > + .set_timeout =3D imx_sc_wdt_set_timeout, }; > + > +static const struct watchdog_info imx_sc_wdt_info =3D { > + .identity =3D "i.MX SC watchdog timer", > + .options =3D WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | > + WDIOF_MAGICCLOSE | WDIOF_PRETIMEOUT, }; > + > +static int imx_sc_wdt_probe(struct platform_device *pdev) { > + struct watchdog_device *imx_sc_wdd; > + int ret; > + > + imx_sc_wdd =3D devm_kzalloc(&pdev->dev, sizeof(*imx_sc_wdd), > GFP_KERNEL); > + if (!imx_sc_wdd) > + return -ENOMEM; > + > + platform_set_drvdata(pdev, imx_sc_wdd); > + > + imx_sc_wdd->info =3D &imx_sc_wdt_info; > + imx_sc_wdd->ops =3D &imx_sc_wdt_ops; > + imx_sc_wdd->min_timeout =3D 1; > + imx_sc_wdd->max_timeout =3D MAX_TIMEOUT; > + imx_sc_wdd->parent =3D &pdev->dev; > + imx_sc_wdd->timeout =3D DEFAULT_TIMEOUT; > + > + ret =3D watchdog_init_timeout(imx_sc_wdd, timeout, &pdev->dev); > + if (ret) > + dev_warn(&pdev->dev, "Failed to set timeout value, using > default\n"); > + > + watchdog_stop_on_reboot(imx_sc_wdd); > + watchdog_stop_on_unregister(imx_sc_wdd); > + > + ret =3D devm_watchdog_register_device(&pdev->dev, imx_sc_wdd); > + if (ret) { > + dev_err(&pdev->dev, "Failed to register watchdog device\n"); > + return ret; > + } > + > + return 0; > +} > + > +static int __maybe_unused imx_sc_wdt_suspend(struct device *dev) { > + struct watchdog_device *imx_sc_wdd =3D dev_get_drvdata(dev); > + > + if (watchdog_active(imx_sc_wdd)) > + imx_sc_wdt_stop(imx_sc_wdd); > + > + return 0; > +} > + > +static int __maybe_unused imx_sc_wdt_resume(struct device *dev) { > + struct watchdog_device *imx_sc_wdd =3D dev_get_drvdata(dev); > + > + if (watchdog_active(imx_sc_wdd)) > + imx_sc_wdt_start(imx_sc_wdd); > + > + return 0; > +} > + > +static SIMPLE_DEV_PM_OPS(imx_sc_wdt_pm_ops, > + imx_sc_wdt_suspend, imx_sc_wdt_resume); > + > +static struct platform_driver imx_sc_wdt_driver =3D { > + .probe =3D imx_sc_wdt_probe, > + .driver =3D { > + .name =3D "imx-sc-wdt", > + .pm =3D &imx_sc_wdt_pm_ops, > + }, > +}; > +module_platform_driver(imx_sc_wdt_driver); > + > +MODULE_AUTHOR("Robin Gong "); > +MODULE_DESCRIPTION("NXP i.MX system controller watchdog driver"); > +MODULE_LICENSE("GPL v2"); > -- > 2.7.4