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Date:   Sun, 10 Mar 2019 20:20:30 +0800
From:   Yang Weijiang <weijiang.yang@intel.com>
To:     Paolo Bonzini <pbonzini@redhat.com>
Cc:     Sean Christopherson <sean.j.christopherson@intel.com>,
        rkrcmar@redhat.com, jmattson@google.com,
        linux-kernel@vger.kernel.org, kvm@vger.kernel.org, mst@redhat.com,
        yu-cheng.yu@intel.com, Zhang Yi Z <yi.z.zhang@linux.intel.com>
Subject: Re: [PATCH v3 7/8] KVM:X86: Add XSS bit 11 and 12 support for CET
 xsaves/xrstors.
Message-ID: <20190310122030.GB24065@local-michael-cet-test.sh.intel.com>
References: <20190225132716.6982-1-weijiang.yang@intel.com>
 <20190225132716.6982-8-weijiang.yang@intel.com>
 <20190228162512.GG6166@linux.intel.com>
 <20190228084404.GD12006@local-michael-cet-test.sh.intel.com>
 <f1b0c3ab-a377-d998-34d3-67c5e951f4e1@redhat.com>
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On Fri, Mar 08, 2019 at 12:32:04PM +0100, Paolo Bonzini wrote:
> On 28/02/19 09:44, Yang Weijiang wrote:
> >>>  		if (!vmx_xsaves_supported())
> >>>  			return 1;
> >>> +
> >>>  		/*
> >>> -		 * The only supported bit as of Skylake is bit 8, but
> >>> -		 * it is not supported on KVM.
> >>> +		 * Check bits being set are supported in KVM.
> >> I'd drop the comment altogether, it's pretty obvious from the code that
> >> were checking which bits are supported.
> > you won't see these redundancies in next version ;)
> >>>  		 */
> >>> -		if (data != 0)
> >>> +		if (data & ~kvm_supported_xss())
> >>>  			return 1;
> 
> You should instead check this against CPUID[0xD, 1].EDX:ECX.  If CET is
> disabled in CPUID, the guest should not be able to set it in MSR_IA32_CSS.
> 
> Paolo
Thanks, OK, will change it.