Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Subject: Re: [RFC PATCH v1] PCI: qcom: Use quirk to override incorrect device
 class
To:     Stanimir Varbanov <svarbanov@mm-sol.com>,
        Bjorn Helgaas <bhelgaas@google.com>
Cc:     Andy Gross <andy.gross@linaro.org>,
        David Brown <david.brown@linaro.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        PCI <linux-pci@vger.kernel.org>,
        MSM <linux-arm-msm@vger.kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Jeffrey Hugo <jhugo@codeaurora.org>
References: <94bb3f22-c5a7-1891-9d89-42a520e9a592@free.fr>
 <65321fe3-ca29-c454-63ae-98a46c2e5158@mm-sol.com>
From:   Marc Gonzalez <marc.w.gonzalez@free.fr>
Message-ID: <1205cbfb-ac06-63a5-9401-75d4e68b15b5@free.fr>
Date:   Tue, 12 Mar 2019 18:18:40 +0100
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101
 Thunderbird/60.5.1
MIME-Version: 1.0
In-Reply-To: <65321fe3-ca29-c454-63ae-98a46c2e5158@mm-sol.com>
Content-Type: text/plain; charset=utf-8
Content-Language: en-US
Content-Transfer-Encoding: 7bit
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

On 12/03/2019 13:42, Stanimir Varbanov wrote:

> On 3/11/19 4:56 PM, Marc Gonzalez wrote:
>
>> Some chips report an incorrect device class. Override the incorrect
>> value using a quirk, instead of code in the read function.
>>
>> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
>> ---
>> FWIW, this quirk is no longer required on recent chips:
>> msm8996 (tested by Stanimir), msm8998 (tested by me), sdm845 (untested) are unaffected
>> apq/ipq8064 is affected => what is the device ID for these chips?
>> others?
>>
>> Stanimir added: "this will become a real problem (now we use the driver as RC)
>> when someone decide to use it as an endpoint"
>> ---
>>  drivers/pci/controller/dwc/pcie-qcom.c | 14 ++++++--------
>>  1 file changed, 6 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
>> index 3de5510fd3d5..94da2c9c2ad5 100644
>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>> @@ -1136,17 +1136,15 @@ static int qcom_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
>>  {
>>  	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>>  
>> -	/* the device class is not reported correctly from the register */
>> -	if (where == PCI_CLASS_REVISION && size == 4) {
>> -		*val = readl(pci->dbi_base + PCI_CLASS_REVISION);
>> -		*val &= 0xff;	/* keep revision id */
>> -		*val |= PCI_CLASS_BRIDGE_PCI << 16;
>> -		return PCIBIOS_SUCCESSFUL;
>> -	}
>> -
> 
> once you dropped the above snippet this function becomes absolutely
> useless so please delete it at all and also from qcom_pcie_dw_ops.

Good catch.

>>  	return dw_pcie_read(pci->dbi_base + where, size, val);
>>  }
>>  
>> +static void qcom_fixup_class(struct pci_dev *dev)
>> +{
>> +	dev->class = PCI_CLASS_BRIDGE_PCI << 8;
>> +}
>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
> 
> I wonder, in case that dw_pcie_setup_rc() already has a write to
> PCI_CLASS_DEVICE configuration register to set it as a bridge do we
> still need to do the above fixup?

I don't know, I don't have an affected device. Unless the msm8998 /is/ affected,
and dw_pcie_setup_rc() actually fixes it?

Regards.