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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id 60sm4006727otw.50.2019.03.12.12.28.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 12 Mar 2019 12:28:04 -0700 (PDT) Date: Tue, 12 Mar 2019 14:28:03 -0500 From: Rob Herring To: Christoph Muellner Cc: mark.rutland@arm.com, heiko@sntech.de, shawn.lin@rock-chips.com, ulf.hansson@linaro.org, adrian.hunter@intel.com, Philipp Tomsich , Michal Simek , Douglas Anderson , Viresh Kumar , Enric Balletbo i Serra , Vicente Bergas , Emil Renner Berthing , Randy Li , Tony Xie , Ezequiel Garcia , Klaus Goger , Lin Huang , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: Re: [PATCH v2 2/3] dt-bindings: mmc: Add a new property disable-cqe-dcmd. Message-ID: <20190312192803.GA19594@bogus> References: <20190307084329.25416-1-christoph.muellner@theobroma-systems.com> <20190307084329.25416-2-christoph.muellner@theobroma-systems.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190307084329.25416-2-christoph.muellner@theobroma-systems.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 07, 2019 at 09:43:27AM +0100, Christoph Muellner wrote: > This patch documents the new property disable-cqe-dcmd > for the Arasan eMMC 5.1 driver. > > Signed-off-by: Christoph Muellner > Signed-off-by: Philipp Tomsich > --- > Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > index 1edbb049cccb..ec699bf98b7c 100644 > --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > @@ -44,6 +44,10 @@ Optional Properties: > properly. Test mode can be used to force the controller to function. > - xlnx,int-clock-stable-broken: when present, the controller always reports > that the internal clock is stable even when it is not. > + - disable-cqe-dcmd: The eMMC 5.1 standard specifies direct commands (DCMDs) > + as part of the command queue engine (CQE). On controllers with a CQHCI, > + such as the Arasan eMMC 5.1 host controller, the driver has to enable DCMDs. > + This is done unless disable-cqe-dcmd is specified. Should be common either for all controllers or all SDHCI controllers?