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From:   Kevin Hilman <khilman@baylibre.com>
To:     Neil Armstrong <narmstrong@baylibre.com>
Cc:     Neil Armstrong <narmstrong@baylibre.com>,
        linux-amlogic@lists.infradead.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins
In-Reply-To: <20190307151342.7381-7-narmstrong@baylibre.com>
References: <20190307151342.7381-1-narmstrong@baylibre.com> <20190307151342.7381-7-narmstrong@baylibre.com>
Date:   Tue, 12 Mar 2019 14:02:45 -0700
Message-ID: <7hbm2fu7pm.fsf@baylibre.com>
MIME-Version: 1.0
Content-Type: text/plain
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Neil Armstrong <narmstrong@baylibre.com> writes:

> This patch adds the 2 UART nodes in the EE power domain with the corresponding
> pinctrl nodes.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Similar to PATCH 4/9, are you wanting to move this to the board series?

Kevin

> ---
>  arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 82 +++++++++++++++++++++
>  1 file changed, 82 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> index 2a700bb45d04..50e2cd36e08b 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> @@ -113,6 +113,61 @@
>  						#gpio-cells = <2>;
>  						gpio-ranges = <&periphs_pinctrl 0 0 86>;
>  					};
> +
> +					uart_a_pins: uart_a {
> +						mux {
> +							groups = "uart_a_tx",
> +								 "uart_a_rx";
> +							function = "uart_a";
> +							bias-disable;
> +						};
> +					};
> +
> +					uart_a_cts_rts_pins: uart_a_cts_rts {
> +						mux {
> +							groups = "uart_a_cts",
> +								 "uart_a_rts";
> +							function = "uart_a";
> +							bias-disable;
> +						};
> +					};
> +
> +					uart_ao_a_c_pins: uart_ao_a_c {
> +						mux {
> +							groups = "uart_ao_a_rx_c",
> +								 "uart_ao_a_tx_c";
> +							function = "uart_ao_a_c";
> +							bias-disable;
> +						};
> +					};
> +
> +					uart_b_pins: uart_b {
> +						mux {
> +							groups = "uart_b_tx",
> +								 "uart_b_rx";
> +							function = "uart_b";
> +							bias-disable;
> +						};
> +					};
> +
> +					uart_c_pins: uart_c {
> +						mux {
> +							groups = "uart_c_tx",
> +								 "uart_c_rx";
> +							function = "uart_c";
> +							bias-disable;
> +						};
> +					};
> +
> +					uart_c_cts_rts_pins: uart_c_cts_rts {
> +						mux {
> +							groups = "uart_c_cts",
> +								 "uart_c_rts";
> +							function = "uart_c";
> +							bias-disable;
> +						};
> +					};
> +				};
>  			};
>  
>  			hiu: bus@3c000 {
> @@ -256,6 +311,33 @@
>  				compatible = "amlogic,meson-g12a-clk-measure";
>  				reg = <0x0 0x18000 0x0 0x10>;
>  			};
> +
> +			uart_C: serial@22000 {
> +				compatible = "amlogic,meson-gx-uart";
> +				reg = <0x0 0x22000 0x0 0x18>;
> +				interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
> +				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
> +				clock-names = "xtal", "pclk", "baud";
> +				status = "disabled";
> +			};
> +
> +			uart_B: serial@23000 {
> +				compatible = "amlogic,meson-gx-uart";
> +				reg = <0x0 0x23000 0x0 0x18>;
> +				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
> +				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
> +				clock-names = "xtal", "pclk", "baud";
> +				status = "disabled";
> +			};
> +
> +			uart_A: serial@24000 {
> +				compatible = "amlogic,meson-gx-uart";
> +				reg = <0x0 0x24000 0x0 0x18>;
> +				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
> +				clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
> +				clock-names = "xtal", "pclk", "baud";
> +				status = "disabled";
> +			};
>  		};
>  	};
>  
> -- 
> 2.20.1