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Thu, 14 Mar 2019 05:32:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1552541555; bh=pxermHq6zXeNhOFIdRTWlt/5Pj8meTaPBvybhvwtFMw=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=EKZ6EDw3Ap/lvcq0Zq+7abMy0DPafGXsX7TGGg/auXn5/amD+odauCHtO62DkrXYf 1UprJQksIGfxWued0m2m4SmE55gIsW2heS1tyc53ms6ntrluuWu4HIwVcqJMQC5z/S sbt4QsXYeUYZRV3ZdBXRWX2xB4JXrbnZdXeqOnZk= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED autolearn=no autolearn_force=no version=3.4.0 Received: from [10.206.25.9] (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: riteshh@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id C5C7660909; Thu, 14 Mar 2019 05:32:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1552541554; bh=pxermHq6zXeNhOFIdRTWlt/5Pj8meTaPBvybhvwtFMw=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=R4aZ0hg5n5n/ZKW26RTxt4hSav7zmH8Y5NXObxCbcTWhsBrTf/5zE5qj9BDxfh+xB j6QvA9dEg7M9eJsxhsRLKmCujta5TwbQJ1lZNIezh45QsB6YdoyHw8OTyW2gG1MH08 S0H3NPnm4Z9xckqTx3gz9ASigVNjIw+w5nDxVz0I= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C5C7660909 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=riteshh@codeaurora.org Subject: Re: [PATCH V3 06/10] mmc: cqhci: allow hosts to update dcmd cmd desc To: Sowjanya Komatineni , adrian.hunter@intel.com, ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: thierry.reding@gmail.com, jonathanh@nvidia.com, anrao@nvidia.com, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org References: <1552513552-23423-1-git-send-email-skomatineni@nvidia.com> <1552513552-23423-6-git-send-email-skomatineni@nvidia.com> From: Ritesh Harjani Message-ID: <8a90c2e5-fd0a-9ea3-59a5-c237c0003a3b@codeaurora.org> Date: Thu, 14 Mar 2019 11:02:28 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.5.3 MIME-Version: 1.0 In-Reply-To: <1552513552-23423-6-git-send-email-skomatineni@nvidia.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3/14/2019 3:15 AM, Sowjanya Komatineni wrote: > This patch adds update_dcmd_desc interface to cqhci_host_ops to > allow hosts to update any of the DCMD task descriptor attributes > and parameters. > > Tested-by: Jon Hunter > Signed-off-by: Sowjanya Komatineni Thanks, Reviewed-by: Ritesh Harjani > --- > drivers/mmc/host/cqhci.c | 2 ++ > drivers/mmc/host/cqhci.h | 2 ++ > 2 files changed, 4 insertions(+) > > diff --git a/drivers/mmc/host/cqhci.c b/drivers/mmc/host/cqhci.c > index a8af682a9182..d59cb0a51964 100644 > --- a/drivers/mmc/host/cqhci.c > +++ b/drivers/mmc/host/cqhci.c > @@ -537,6 +537,8 @@ static void cqhci_prep_dcmd_desc(struct mmc_host *mmc, > CQHCI_ACT(0x5) | > CQHCI_CMD_INDEX(mrq->cmd->opcode) | > CQHCI_CMD_TIMING(timing) | CQHCI_RESP_TYPE(resp_type)); > + if (cq_host->ops->update_dcmd_desc) > + cq_host->ops->update_dcmd_desc(mmc, mrq, &data); > *task_desc |= data; > desc = (u8 *)task_desc; > pr_debug("%s: cqhci: dcmd: cmd: %d timing: %d resp: %d\n", > diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h > index 9e68286a07b4..8c8ec6f01c45 100644 > --- a/drivers/mmc/host/cqhci.h > +++ b/drivers/mmc/host/cqhci.h > @@ -210,6 +210,8 @@ struct cqhci_host_ops { > u32 (*read_l)(struct cqhci_host *host, int reg); > void (*enable)(struct mmc_host *mmc); > void (*disable)(struct mmc_host *mmc, bool recovery); > + void (*update_dcmd_desc)(struct mmc_host *mmc, struct mmc_request *mrq, > + u64 *data); > }; > > static inline void cqhci_writel(struct cqhci_host *host, u32 val, int reg)