Received: by 2002:ac0:a874:0:0:0:0:0 with SMTP id c49csp109563ima; Thu, 14 Mar 2019 21:35:02 -0700 (PDT) X-Google-Smtp-Source: APXvYqxGPpCFlGgIJnBDQT9Sq80G2aBDR+ZpeJQVwWJxqEBtALRultHREmMgrAq9oNMrqMUjXb9O X-Received: by 2002:a63:1354:: with SMTP id 20mr1496479pgt.198.1552624502214; Thu, 14 Mar 2019 21:35:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1552624502; cv=none; d=google.com; s=arc-20160816; b=lDSJ0cTVVnKtQBAUuxRYg0gONR+zq40HunQ8kBy7W+fu0w+GOBq3pJNliOZ9eDhgXy YVs9QFg3q+LVMXss669ZmneAaNLsqVhoQk3WPANgPKm/QNBLRhxHyeey/8uKDHisT7g0 lYsRG60xzbMiMPj5t8EOe9udCsASBhHsyw2kIcjkLuc7I8lzkgvkDqbfO/zqp5W88G77 p19L2ghsKtd3fltQEmWzmOKcPXL62laVujNr8d4FvbFFP0p7tLFgJhMJlMtolK0k8PSz mLqWPhA3/EbPglnenuZjAX6Jsjle3hTNzD/D2h7/xfy2nwCTfH0snPi6zwserS2qbbDp LBUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:cc:subject:to :message-id:from:date; bh=usNOjjIPkaq4iuZ8ZyfCJUhuzhs5rmk7Y6lfuCUxNJ8=; b=HoLj754KjC4ez4k7uBmGvMvK3CHlkkLJRbAwnjX/z1qDihOD/WPZKrGqf7p19M8Kf3 x8/grHIqh5367usiJQKkGLw6azPrrYSQ1BfGJZ/AbsJUXerpnvDoHnlGlpGqLqIxNiM6 EUX6zpKshIO7X1AQ/CpyC9M1N4UJiLxXc3zkuoEM5+FH8lBr8B5+ft0fRb6vubAIyWmA jwTReyD7GUFvaj27t8lybLiiKNVfbje+4wfc3tolkcD3qU+mNQcwC/Ihzdoy624PvVoO gHZzzX78Etg6yE8rdM8QiT8WPahmlhNuV0LSr2vrmDMfRtmlB8om2KWT8fHmORZmDHoh eKPg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 75si889082pgb.230.2019.03.14.21.34.36; Thu, 14 Mar 2019 21:35:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727556AbfCOEdg (ORCPT + 99 others); Fri, 15 Mar 2019 00:33:36 -0400 Received: from mx.sdf.org ([205.166.94.20]:54552 "EHLO mx.sdf.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727166AbfCOEdf (ORCPT ); Fri, 15 Mar 2019 00:33:35 -0400 Received: from sdf.org (IDENT:lkml@sdf.lonestar.org [205.166.94.16]) by mx.sdf.org (8.15.2/8.14.5) with ESMTPS id x2F4XACg004600 (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256 bits) verified NO); Fri, 15 Mar 2019 04:33:10 GMT Received: (from lkml@localhost) by sdf.org (8.15.2/8.12.8/Submit) id x2F4X9oT024601; Fri, 15 Mar 2019 04:33:09 GMT Date: Fri, 15 Mar 2019 04:33:09 GMT From: George Spelvin Message-Id: <201903150433.x2F4X9oT024601@sdf.org> To: andriy.shevchenko@linux.intel.com, lkml@sdf.org Subject: Re: [PATCH 4/5] lib/list_sort: Simplify and remove MAX_LIST_LENGTH_BITS Cc: akpm@linux-foundation.org, daniel.wagner@siemens.com, dchinner@redhat.com, don.mullis@gmail.com, geert@linux-m68k.org, linux-kernel@vger.kernel.org, linux@rasmusvillemoes.dk, st5pub@yandex.ru In-Reply-To: <20190314091041.GU9224@smile.fi.intel.com> References: , , <20190314091041.GU9224@smile.fi.intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 14 Mar 2019 at 11:10:41 +0200, Andy Shevchenko wrote: > On Tue, Mar 05, 2019 at 03:06:44AM +0000, George Spelvin wrote: >> + for (bit = 1; count & bit; bit <<= 1) { >> + cur = merge(priv, (cmp_func)cmp, pending, cur); >> + pending = pending->prev; /* Untouched by merge() */ >> } > > Wouldn't be it the same to > > bit = ffz(count); > while (bit--) { > ... > } > ? > > Though I dunno which one is generating better code. One question I should ask everyone: should "count" be 32 or 64 bits on 64-bit machines? That would let x86 save a few REX bytes. (815 vs. 813 byte code, if anyone cares.) Allegedy ARM can save a few pJ by gating the high 32 bits of the ALU. Most other 64-bit processors would prefer 64-bit operations as it saves masking operations. If we never sort a list with more than 2^32 entries, it makes no difference. If we use a 32-bit count and we *do* sort a list with more than 2^32 entries, then it still sorts, but the performance degrades to O((n/2^32)^2). Just how often do we expect the kernel to face lists that long? (Note that the old code was O((n/2^20)^2).) In the code, I could do something like #ifdef CONFIG_X86_64 /* Comment explaining why */ typedef uint32_t count_t; #else typedef size_t count_t; #endif ... count_t count = 0;