Received: by 2002:ac0:a874:0:0:0:0:0 with SMTP id c49csp630196ima; Fri, 15 Mar 2019 10:21:54 -0700 (PDT) X-Google-Smtp-Source: APXvYqxUd4bHhfB/fHoPFMxn4Pk67aEzoZlZDQkcfkq1kaUPYc3hP/CgYbNi33KWKyQCyh10MtGn X-Received: by 2002:a62:be08:: with SMTP id l8mr5142769pff.162.1552670514483; Fri, 15 Mar 2019 10:21:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1552670514; cv=none; d=google.com; s=arc-20160816; b=kINe5fQC8/LGNqPGYlbIHrjyZZS9qlqF+zC+2dezsUNCQ9IYElNAylHlOOOKpZrz3C PIQBff/Rez8D5+pJOFn2OeJV2p4YNN7HuNkQPmxuwpRYsJV3TAXDiu9NhnXgK3K6LheQ vMAlhd1zuQXEYxTdSFhF/DQOSl8cV+BigHEvaMzZvN6W758uVC2dZqO9YecS+ajd995z FDPxka/pFHLPBFg50DVyLEAIDnzIC1s4B7EiNUoMgo4M9sbmPKyy/jU9iMA+4HdOMD0b V4Cbbi8qgmfkCGEGrKy7ubCMjRrQyVcxbXchLf0UTebZK1H9U+XkysJkABEEOuCfiClc W6Gg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:date:message-id:in-reply-to:subject:cc:to :from:dkim-signature; bh=ND+XrZBR4qOjYj5GKv0Q2tW7zwE5uFytjyeNgD8uyW8=; b=kYYTJ42IMmpR6oTZiCiqiMi2JFPzGGoV5lekiM7erfO7JY/cC6gh598zFfpUimXCNf iUKQlmWdAw+iRyf5AEqvregKyK8kBCt0tBVPfv5KNjyhJCV7YBqYnDSJ/Vh8T2g0UtF+ ygCKz1kzYHAInSg3QZOw94O5KvkzM/Qbmh17tuN3Lbj9917kbhSvtFIHJy27Hg6Zuz6o +OU2jB835YlBxjDwmsjY0YLaBvv1G7Nun1Qo5Zp60W1JDeeWeQQIg39/VDBslLXBcMwV PcwnVXU5EyBXfp2+oEK1yp0E6XgKZ7wZw6Hf3zL1ApBZEl2Bn8EuTR/R1PrH0deEazMt qJTg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=LgouO23n; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h69si2512586pfc.120.2019.03.15.10.21.39; Fri, 15 Mar 2019 10:21:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=LgouO23n; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729891AbfCORTp (ORCPT + 99 others); Fri, 15 Mar 2019 13:19:45 -0400 Received: from heliosphere.sirena.org.uk ([172.104.155.198]:54678 "EHLO heliosphere.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729665AbfCORTp (ORCPT ); Fri, 15 Mar 2019 13:19:45 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sirena.org.uk; s=20170815-heliosphere; h=Date:Message-Id:In-Reply-To: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Id:List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner: List-Archive; bh=ND+XrZBR4qOjYj5GKv0Q2tW7zwE5uFytjyeNgD8uyW8=; b=LgouO23nx3m3 r0yXCw99nEx+z1iWjKBoFqty+9eeTA9c+gjs2dlrHRq+MI32OeptmNvyXQI3NRfnzpqDI28h6yu5y yFh5g/bW80fNbI6FTKQNVA5qbgZwjl4cmHwpux4FyYZmvXq3UnxccKy0WxvquYwluAJ0unKsT06Ea bhkdQ=; Received: from cpc102320-sgyl38-2-0-cust46.18-2.cable.virginm.net ([82.37.168.47] helo=debutante.sirena.org.uk) by heliosphere.sirena.org.uk with esmtpa (Exim 4.89) (envelope-from ) id 1h4qUb-0002fG-82; Fri, 15 Mar 2019 17:19:37 +0000 Received: by debutante.sirena.org.uk (Postfix, from userid 1000) id AFE6C1126E81; Fri, 15 Mar 2019 17:19:36 +0000 (GMT) From: Mark Brown To: Ludovic Barre Cc: Mark Brown , Mark Brown , Marek Vasut , Boris Brezillon , Rob Herring , Maxime Coquelin , Alexandre Torgue , linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, devicetree@vger.kernel.org, linux-spi@vger.kernel.org Subject: Applied "spi: spi-mem: stm32-qspi: avoid memory corruption at low frequency" to the spi tree In-Reply-To: <1552050741-27739-2-git-send-email-ludovic.Barre@st.com> X-Patchwork-Hint: ignore Message-Id: <20190315171936.AFE6C1126E81@debutante.sirena.org.uk> Date: Fri, 15 Mar 2019 17:19:36 +0000 (GMT) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The patch spi: spi-mem: stm32-qspi: avoid memory corruption at low frequency has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From 5356c2c70e385198e1a753ee364323f2fc01f759 Mon Sep 17 00:00:00 2001 From: Ludovic Barre Date: Fri, 8 Mar 2019 14:12:20 +0100 Subject: [PATCH] spi: spi-mem: stm32-qspi: avoid memory corruption at low frequency This patch solves a memory corruption seen at 8 MHz. To avoid such issue, timeout counter is disabled. Signed-off-by: Ludovic Barre Signed-off-by: Mark Brown --- drivers/spi/spi-stm32-qspi.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/spi/spi-stm32-qspi.c b/drivers/spi/spi-stm32-qspi.c index 3b2a9a6b990d..7354f9d68dba 100644 --- a/drivers/spi/spi-stm32-qspi.c +++ b/drivers/spi/spi-stm32-qspi.c @@ -76,7 +76,6 @@ #define QSPI_PSMAR 0x28 #define QSPI_PIR 0x2c #define QSPI_LPTR 0x30 -#define LPTR_DFT_TIMEOUT 0x10 #define STM32_QSPI_MAX_MMAP_SZ SZ_256M #define STM32_QSPI_MAX_NORCHIP 2 @@ -372,8 +371,7 @@ static int stm32_qspi_setup(struct spi_device *spi) flash->presc = presc; mutex_lock(&qspi->lock); - writel_relaxed(LPTR_DFT_TIMEOUT, qspi->io_base + QSPI_LPTR); - cr = FIELD_PREP(CR_FTHRES_MASK, 3) | CR_TCEN | CR_SSHIFT | CR_EN; + cr = FIELD_PREP(CR_FTHRES_MASK, 3) | CR_SSHIFT | CR_EN; writel_relaxed(cr, qspi->io_base + QSPI_CR); /* set dcr fsize to max address */ -- 2.20.1