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Subject: Re: [PATCH] kvm: x86: Return LA57 feature based on hardware
 capability
To:     Yu Zhang <yu.c.zhang@linux.intel.com>, kvm@vger.kernel.org
Cc:     =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= <rkrcmar@redhat.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        "H. Peter Anvin" <hpa@zytor.com>, linux-kernel@vger.kernel.org
References: <1548950983-18458-1-git-send-email-yu.c.zhang@linux.intel.com>
From:   Paolo Bonzini <pbonzini@redhat.com>
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Message-ID: <a586953c-98dc-7147-966c-5e81c3bf5e36@redhat.com>
Date:   Fri, 15 Mar 2019 18:33:27 +0100
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On 31/01/19 17:09, Yu Zhang wrote:
> Previously, 'commit 372fddf70904 ("x86/mm: Introduce the 'no5lvl' kernel
> parameter")' cleared X86_FEATURE_LA57 in boot_cpu_data, if Linux chooses
> to not run in 5-level paging mode. Yet boot_cpu_data is queried by
> do_cpuid_ent() as the host capability later when creating vcpus, and Qemu
> will not be able to detect this feature and create VMs with LA57 feature.
> 
> As discussed earlier, VMs can still benefit from extended linear address
> width, e.g. to enhance features like ASLR. So we would like to fix this,
> by return the true hardware capability when Qemu queries.
> 
> Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
> ---
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: "Radim Krčmář" <rkrcmar@redhat.com>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: Borislav Petkov <bp@alien8.de>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: linux-kernel@vger.kernel.org
> ---
>  arch/x86/kvm/cpuid.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index bbffa6c..c07958b 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -335,6 +335,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
>  	unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
>  	unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0;
>  	unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
> +	unsigned f_la57 = 0;
>  
>  	/* cpuid 1.edx */
>  	const u32 kvm_cpuid_1_edx_x86_features =
> @@ -489,7 +490,10 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
>  			// TSC_ADJUST is emulated
>  			entry->ebx |= F(TSC_ADJUST);
>  			entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
> +			f_la57 = entry->ecx & F(LA57);
>  			cpuid_mask(&entry->ecx, CPUID_7_ECX);
> +			/* Set LA57 based on hardware capability. */
> +			entry->ecx |= f_la57;
>  			entry->ecx |= f_umip;
>  			/* PKU is not yet implemented for shadow paging. */
>  			if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
> 

Queued for 5.1 past merge window, thanks.

Paolo