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[209.132.180.67]) by mx.google.com with ESMTP id d11si8543572pls.255.2019.03.18.00.36.09; Mon, 18 Mar 2019 00:36:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727555AbfCRHek (ORCPT + 99 others); Mon, 18 Mar 2019 03:34:40 -0400 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76]:40906 "EHLO wens.csie.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726876AbfCRHeO (ORCPT ); Mon, 18 Mar 2019 03:34:14 -0400 Received: by wens.csie.org (Postfix, from userid 1000) id 0C6CD5FDF9; Mon, 18 Mar 2019 15:34:12 +0800 (CST) From: Chen-Yu Tsai To: Srinivas Kandagatla , Maxime Ripard Cc: linux-sunxi@googlegroups.com, Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/6] nvmem: sunxi_sid: Read out data in native format Date: Mon, 18 Mar 2019 15:33:52 +0800 Message-Id: <20190318073354.12151-5-wens@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190318073354.12151-1-wens@kernel.org> References: <20190318073354.12151-1-wens@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chen-Yu Tsai Originally the SID e-fuses were thought to be in big-endian format. Later sources show that they are in fact native or little-endian. The most compelling evidence is the thermal sensor calibration data, which is a set of one to three 16-bit values. In native-endian they are in 16-bit cells with increasing offsets, whereas with big-endian they are in the wrong order, and a gap with no data will show if there are one or three cells. Switch to a native endian representation for the nvmem device. For the H3, the register read-out method was already returning data in native endian. This only affects the other SoCs. Signed-off-by: Chen-Yu Tsai --- drivers/nvmem/sunxi_sid.c | 23 +---------------------- 1 file changed, 1 insertion(+), 22 deletions(-) diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c index 75c1f48cb3d0..14c114620ed6 100644 --- a/drivers/nvmem/sunxi_sid.c +++ b/drivers/nvmem/sunxi_sid.c @@ -46,33 +46,12 @@ struct sunxi_sid { u32 value_offset; }; -/* We read the entire key, due to a 32 bit read alignment requirement. Since we - * want to return the requested byte, this results in somewhat slower code and - * uses 4 times more reads as needed but keeps code simpler. Since the SID is - * only very rarely probed, this is not really an issue. - */ -static u8 sunxi_sid_read_byte(const struct sunxi_sid *sid, - const unsigned int offset) -{ - u32 sid_key; - - sid_key = ioread32be(sid->base + round_down(offset, 4)); - sid_key >>= (offset % 4) * 8; - - return sid_key; /* Only return the last byte */ -} - static int sunxi_sid_read(void *context, unsigned int offset, void *val, size_t bytes) { struct sunxi_sid *sid = context; - u8 *buf = val; - - /* Offset the read operation to the real position of SID */ - offset += sid->value_offset; - while (bytes--) - *buf++ = sunxi_sid_read_byte(sid, offset++); + memcpy_fromio(val, sid->base + sid->value_offset + offset, bytes); return 0; } -- 2.20.1