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From:   Stephen Boyd <sboyd@kernel.org>
Subject: Re: [PATCH] drivers: clk: zynqmp: Allow zero divisor value
Cc:     rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, Rajan Vaja <rajan.vaja@xilinx.com>,
        Jolly Shah <jollys@xilinx.com>
To:     Jolly Shah <jolly.shah@xilinx.com>, linux-clk@vger.kernel.org,
        michal.simek@xilinx.com, mturquette@baylibre.com,
        sboyd@codeaurora.org
Message-ID: <155293817691.20095.7275560826051843640@swboyd.mtv.corp.google.com>
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Date:   Mon, 18 Mar 2019 12:42:56 -0700
Sender: linux-kernel-owner@vger.kernel.org
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Quoting Michal Simek (2019-03-18 05:48:52)
> On 05. 03. 19 0:27, Jolly Shah wrote:
> > From: Rajan Vaja <rajan.vaja@xilinx.com>
> >=20
> > Zero divider is valid and default for some of ZynqMP
> > clocks. Allow zero divisor when CLK_DIVIDER_ALLOW_ZERO
> > for the clock is set.
> >=20
> > Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
> > Signed-off-by: Jolly Shah <jollys@xilinx.com>
> > ---
> >  drivers/clk/zynqmp/divider.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >=20
> > diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c
> > index a371c66..e146b6f 100644
> > --- a/drivers/clk/zynqmp/divider.c
> > +++ b/drivers/clk/zynqmp/divider.c
> > @@ -76,6 +76,13 @@ static unsigned long zynqmp_clk_divider_recalc_rate(=
struct clk_hw *hw,
> >       else
> >               value =3D div >> 16;
> > =20
> > +     if (!value) {
> > +             WARN(!(divider->flags & CLK_DIVIDER_ALLOW_ZERO),
> > +                  "%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set=
\n",
> > +                  clk_name);
> > +             return parent_rate;
> > +     }
> > +
> >       return DIV_ROUND_UP_ULL(parent_rate, value);
> >  }
> > =20
> >=20
>=20
> Stephen: Do you want to take it via your tree?
>=20

Sure.