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Date:   Tue, 19 Mar 2019 12:52:58 +0000
From:   Catalin Marinas <catalin.marinas@arm.com>
To:     Mark Rutland <mark.rutland@arm.com>
Cc:     "Zhang, Lei" <zhang.lei@jp.fujitsu.com>,
        "Okamoto, Takayuki" <tokamoto@jp.fujitsu.com>,
        Will Deacon <will.deacon@arm.com>,
        James Morse <james.morse@arm.com>,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [RESEND PATCH] Make Fujitsu Erratum 010001 patch can be applied
 on A64FX v1r0
Message-ID: <20190319125258.GD59586@arrakis.emea.arm.com>
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On Mon, Mar 18, 2019 at 12:06:06PM +0000, Mark Rutland wrote:
> From 6439e9c0b1525e9d4c7be65552e6f2b1f9d1dbe0 Mon Sep 17 00:00:00 2001
> From: "Okamoto, Takayuki" <tokamoto@jp.fujitsu.com>
> Date: Fri, 15 Mar 2019 12:22:36 +0000
> Subject: [PATCH] arm64: apply workaround on A64FX v1r0
> 
> Fujitsu erratum 010001 applies to A64FX v0r0 and v1r0, and we try to
> handle either by masking MIDR with MIDR_FUJITSU_ERRATUM_010001_MASK
> before comparing it to MIDR_FUJITSU_ERRATUM_010001.
> 
> Unfortunately, MIDR_FUJITSU_ERRATUM_010001 is constructed incorrectly
> using MIDR_VARIANT(), which is intended to extract the variant field
> from MIDR_EL1, rather than generate the field in-place. This results in
> MIDR_FUJITSU_ERRATUM_010001 being all-ones, and we only match A64FX
> v0r0.
> 
> This patch uses MIDR_CPU_VAR_REV() to generate an in-place mask for the
> variant field, ensuring the we match both v0r0 and v1r0.
> 
> Fixes: 3e32131abc311a5c ("arm64: Add workaround for Fujitsu A64FX erratum 010001")
> Signed-off-by: Zhang Lei <zhang.lei@jp.fujitsu.com>
> [Mark: use MIDR_CPU_VAR_REV(), reword commit message]
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>

Thanks. Mark's variant queued for 5.1-rc2.

-- 
Catalin