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Subject: Re: [PATCH 00/12] misc: xilinx sd-fec driver
To:     Dragan Cvetic <draganc@xilinx.com>,
        "arnd@arndb.de" <arnd@arndb.de>,
        "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Derek Kiernan <dkiernan@xilinx.com>
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From:   Michal Simek <michal.simek@xilinx.com>
Message-ID: <fadca342-1ef6-97e7-1399-929dbf5b69f2@xilinx.com>
Date:   Tue, 19 Mar 2019 14:51:23 +0100
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On 19. 03. 19 14:44, Dragan Cvetic wrote:
> 
> 
>> -----Original Message-----
>> From: Michal Simek [mailto:michal.simek@xilinx.com]
>> Sent: Tuesday 19 March 2019 12:18
>> To: Dragan Cvetic <draganc@xilinx.com>; arnd@arndb.de; gregkh@linuxfoundation.org; Michal Simek <michals@xilinx.com>; linux-
>> arm-kernel@lists.infradead.org
>> Cc: linux-kernel@vger.kernel.org; Derek Kiernan <dkiernan@xilinx.com>
>> Subject: Re: [PATCH 00/12] misc: xilinx sd-fec driver
>>
>> On 19. 03. 19 13:04, Dragan Cvetic wrote:
>>> This patchset is adding the full Soft Decision Forward Error
>>> Correction (SD-FEC) driver implementation, driver DT binding and
>>> driver documentation.
>>>
>>> Forward Error Correction (FEC) codes such as Low Density Parity
>>> Check (LDPC) and turbo codes provide a means to control errors in
>>> data transmissions over unreliable or noisy communication
>>> channels. The SD-FEC Integrated Block is an optimized block for
>>> soft-decision decoding of these codes. Fixed turbo codes are
>>> supported directly, whereas custom and standardized LDPC codes
>>> are supported through the ability to specify the parity check
>>> matrix through an AXI4-Lite bus or using the optional programmable
>>> (PL)-based support logic. For the further information see
>>> https://www.xilinx.com/support/documentation/ip_documentation/
>>> sd_fec/v1_1/pg256-sdfec-integrated-block.pdf
>>>
>>> This driver is a platform device driver which supports SDFEC16
>>> (16nm) IP. SD-FEC driver supports LDPC decoding and encoding and
>>> Turbo code decoding. LDPC codes can be specified on
>>> a codeword-by-codeword basis, also a custom LDPC code can be used.
>>>
>>> The SD-FEC driver exposes a char device interface and supports
>>> file operations: open(), close(), poll() and ioctl(). The driver
>>> allows only one usage of the device, open() limits the number of
>>> driver instances. The driver also utilize Common Clock Framework
>>> (CCF).
>>>
>>> The control and monitoring is supported over ioctl system call.
>>> The features supported by ioctl():
>>> - enable or disable data pipes to/from device
>>> - configure the FEC algorithm parameters
>>> - set the order of data
>>> - provide a control of a SDFEC bypass option
>>> - activates/deactivates SD-FEC
>>> - collect and provide statistical data
>>> - enable/disable interrupt mode
>>>
>>> Poll can be utilized to detect errors on IRQ trigger rather than
>>> using looping status and stats ioctl's.
>>>
>>> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
>>
>> I am not using this tag a lot that's why I am curious where you got it
>> from? I can't see it in Xilinx tree too.
>>
>> Thanks,
>> Michal
> 
> It is copied from the email address in Outlook. I'll correct this to michals@xilinx.com.

It is not about email address. It is about meaning of that line.
I have never done deep review of this driver that you can put here my
tag that I have reviewed that.
It means you should remove all these lines from all patches were you put
it because I have never gave you this tag.

Thanks,
Michal