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[86.30.250.44]) by smtp.googlemail.com with ESMTPSA id z14sm2950585wrv.78.2019.03.20.07.25.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 20 Mar 2019 07:25:29 -0700 (PDT) Subject: Re: [PATCH v2 0/6] Add nvmem support on STM32 To: Fabrice Gasnier , robh+dt@kernel.org, alexandre.torgue@st.com Cc: mark.rutland@arm.com, mcoquelin.stm32@gmail.com, lionel.debieve@st.com, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <1551349196-8956-1-git-send-email-fabrice.gasnier@st.com> From: Srinivas Kandagatla Message-ID: <06ec547f-8c7c-0326-200f-22fcdca42b72@linaro.org> Date: Wed, 20 Mar 2019 14:25:28 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <1551349196-8956-1-git-send-email-fabrice.gasnier@st.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28/02/2019 10:19, Fabrice Gasnier wrote: > Non volatile memory area is available on STM32. It contains various > factory programmed information such as unique device ID, analog calibration... > This patchset adds: > - NVMEM support to access stm32 data cells > - helper to read 16 bits cells. > > --- > Changes in v2: > - update "st,stm32f4-otp" compatible as discussed with Rob > - add stm32f429 dts > - add core helper to read 16 bits cells > > Fabrice Gasnier (6): > dt-bindings: nvmem: Add STM32 factory-programmed romem > nvmem: Add driver for STM32 factory-programmed read only mem > nvmem: stm32: add support for STM32MP15 BSEC to control OTP data > nvmem: core: add nvmem_cell_read_u16 Applied all the nvmem patches except DTS patches to nvmem next Thanks, srini