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Date:   Wed, 20 Mar 2019 16:58:15 +0100
From:   Peter Zijlstra <peterz@infradead.org>
To:     Andi Kleen <ak@linux.intel.com>
Cc:     kan.liang@linux.intel.com, acme@kernel.org, mingo@redhat.com,
        linux-kernel@vger.kernel.org, tglx@linutronix.de, jolsa@kernel.org,
        eranian@google.com, alexander.shishkin@linux.intel.com
Subject: Re: [PATCH 03/22] perf/x86/intel: Support adaptive PEBSv4
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On Tue, Mar 19, 2019 at 02:38:24PM -0700, Andi Kleen wrote:
> > How much work would intel_pmu_drain_pebs_icl() be?
> > 
> > I'm thinking that might not be terrible.
> 
> I had it in an early version of the code, but it ended up with a lot 
> of code duplication.

I'm thinking that if you remove all the <v3 nonsense, it shouldn't be
_that_ much. A quick hack here makes it ~60 lines.

And it avoids sprinkling a whole bunch of conditionals around and
introducing that new x86_pmu method.