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[209.132.180.67]) by mx.google.com with ESMTP id w10si4091980plq.328.2019.03.21.03.44.49; Thu, 21 Mar 2019 03:45:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@c-s.fr header.s=mail header.b=MloDulJC; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727928AbfCUKmT (ORCPT + 99 others); Thu, 21 Mar 2019 06:42:19 -0400 Received: from pegase1.c-s.fr ([93.17.236.30]:23608 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727823AbfCUKmT (ORCPT ); Thu, 21 Mar 2019 06:42:19 -0400 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 44Q3JS200tz9v0B8; Thu, 21 Mar 2019 11:42:16 +0100 (CET) Authentication-Results: localhost; dkim=pass reason="1024-bit key; insecure key" header.d=c-s.fr header.i=@c-s.fr header.b=MloDulJC; dkim-adsp=pass; dkim-atps=neutral X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id LBoym5aw1n9X; Thu, 21 Mar 2019 11:42:16 +0100 (CET) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 44Q3JS0l5tz9v0B7; Thu, 21 Mar 2019 11:42:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=c-s.fr; s=mail; t=1553164936; bh=hWhV83rjkz3EivB2em33ZdXjItgzDWsKrPC2D7mXuuY=; h=Subject:From:To:Cc:References:Date:In-Reply-To:From; b=MloDulJCXrG3HhEM/uguvR/vPTx+aWUYKkaYn1krNra5bFBbd689WkQ2mlOjZmXP+ QP5ktezrY7eDGaN+UVxFH2tSuDNxRlp6IufUint2SXsroHitdJA1dW7uiRDfdlowOk H8opQK/FuFrxJJcxca5q4xGl5lVwKEq7B7OCiLLg= Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 2A9DE8B966; Thu, 21 Mar 2019 11:42:17 +0100 (CET) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id sPGQ8qN0i2X5; Thu, 21 Mar 2019 11:42:17 +0100 (CET) Received: from PO15451 (unknown [192.168.4.90]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 6AC938B955; Thu, 21 Mar 2019 11:42:16 +0100 (CET) Subject: Re: [PATCH v1 11/27] powerpc/mm: split asm/hugetlb.h into dedicated subarch files From: Christophe Leroy To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , aneesh.kumar@linux.ibm.com, Russell Currey Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org References: <0049d5686df8fe29cc7a6f45461fe2550d8a4685.1553076180.git.christophe.leroy@c-s.fr> Message-ID: <1e0db736-f30b-b70d-94b7-a68f95edbceb@c-s.fr> Date: Thu, 21 Mar 2019 11:42:16 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.5.3 MIME-Version: 1.0 In-Reply-To: <0049d5686df8fe29cc7a6f45461fe2550d8a4685.1553076180.git.christophe.leroy@c-s.fr> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: fr Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org snowpatch fails applying this. I usually base my patches on branch merge. Shouldn't snowpatch use merge branch as well instead of next branch ? Christophe Le 20/03/2019 à 11:06, Christophe Leroy a écrit : > Three subarches support hugepages: > - fsl book3e > - book3s/64 > - 8xx > > This patch splits asm/hugetlb.h to reduce the #ifdef mess. > > Signed-off-by: Christophe Leroy > --- > arch/powerpc/include/asm/book3s/64/hugetlb.h | 41 +++++++++++ > arch/powerpc/include/asm/hugetlb.h | 89 ++---------------------- > arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h | 32 +++++++++ > arch/powerpc/include/asm/nohash/hugetlb-book3e.h | 31 +++++++++ > 4 files changed, 108 insertions(+), 85 deletions(-) > create mode 100644 arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h > create mode 100644 arch/powerpc/include/asm/nohash/hugetlb-book3e.h > > diff --git a/arch/powerpc/include/asm/book3s/64/hugetlb.h b/arch/powerpc/include/asm/book3s/64/hugetlb.h > index ec2a55a553c7..2f9cf2bc601c 100644 > --- a/arch/powerpc/include/asm/book3s/64/hugetlb.h > +++ b/arch/powerpc/include/asm/book3s/64/hugetlb.h > @@ -62,4 +62,45 @@ extern pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma, > extern void huge_ptep_modify_prot_commit(struct vm_area_struct *vma, > unsigned long addr, pte_t *ptep, > pte_t old_pte, pte_t new_pte); > +/* > + * This should work for other subarchs too. But right now we use the > + * new format only for 64bit book3s > + */ > +static inline pte_t *hugepd_page(hugepd_t hpd) > +{ > + if (WARN_ON(!hugepd_ok(hpd))) > + return NULL; > + /* > + * We have only four bits to encode, MMU page size > + */ > + BUILD_BUG_ON((MMU_PAGE_COUNT - 1) > 0xf); > + return __va(hpd_val(hpd) & HUGEPD_ADDR_MASK); > +} > + > +static inline unsigned int hugepd_mmu_psize(hugepd_t hpd) > +{ > + return (hpd_val(hpd) & HUGEPD_SHIFT_MASK) >> 2; > +} > + > +static inline unsigned int hugepd_shift(hugepd_t hpd) > +{ > + return mmu_psize_to_shift(hugepd_mmu_psize(hpd)); > +} > +static inline void flush_hugetlb_page(struct vm_area_struct *vma, > + unsigned long vmaddr) > +{ > + if (radix_enabled()) > + return radix__flush_hugetlb_page(vma, vmaddr); > +} > + > +static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr, > + unsigned int pdshift) > +{ > + unsigned long idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd); > + > + return hugepd_page(hpd) + idx; > +} > + > +void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr); > + > #endif > diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h > index 48c29686c78e..fd5c0873a57d 100644 > --- a/arch/powerpc/include/asm/hugetlb.h > +++ b/arch/powerpc/include/asm/hugetlb.h > @@ -6,85 +6,13 @@ > #include > > #ifdef CONFIG_PPC_BOOK3S_64 > - > #include > -/* > - * This should work for other subarchs too. But right now we use the > - * new format only for 64bit book3s > - */ > -static inline pte_t *hugepd_page(hugepd_t hpd) > -{ > - if (WARN_ON(!hugepd_ok(hpd))) > - return NULL; > - /* > - * We have only four bits to encode, MMU page size > - */ > - BUILD_BUG_ON((MMU_PAGE_COUNT - 1) > 0xf); > - return __va(hpd_val(hpd) & HUGEPD_ADDR_MASK); > -} > - > -static inline unsigned int hugepd_mmu_psize(hugepd_t hpd) > -{ > - return (hpd_val(hpd) & HUGEPD_SHIFT_MASK) >> 2; > -} > - > -static inline unsigned int hugepd_shift(hugepd_t hpd) > -{ > - return mmu_psize_to_shift(hugepd_mmu_psize(hpd)); > -} > -static inline void flush_hugetlb_page(struct vm_area_struct *vma, > - unsigned long vmaddr) > -{ > - if (radix_enabled()) > - return radix__flush_hugetlb_page(vma, vmaddr); > -} > - > -#else > - > -static inline pte_t *hugepd_page(hugepd_t hpd) > -{ > - if (WARN_ON(!hugepd_ok(hpd))) > - return NULL; > -#ifdef CONFIG_PPC_8xx > - return (pte_t *)__va(hpd_val(hpd) & ~HUGEPD_SHIFT_MASK); > -#else > - return (pte_t *)((hpd_val(hpd) & > - ~HUGEPD_SHIFT_MASK) | PD_HUGE); > -#endif > -} > - > -static inline unsigned int hugepd_shift(hugepd_t hpd) > -{ > -#ifdef CONFIG_PPC_8xx > - return ((hpd_val(hpd) & _PMD_PAGE_MASK) >> 1) + 17; > -#else > - return hpd_val(hpd) & HUGEPD_SHIFT_MASK; > -#endif > -} > - > +#elif defined(CONFIG_PPC_FSL_BOOK3E) > +#include > +#elif defined(CONFIG_PPC_8xx) > +#include > #endif /* CONFIG_PPC_BOOK3S_64 */ > > - > -static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr, > - unsigned pdshift) > -{ > - /* > - * On FSL BookE, we have multiple higher-level table entries that > - * point to the same hugepte. Just use the first one since they're all > - * identical. So for that case, idx=0. > - */ > - unsigned long idx = 0; > - > - pte_t *dir = hugepd_page(hpd); > -#ifdef CONFIG_PPC_8xx > - idx = (addr & ((1UL << pdshift) - 1)) >> PAGE_SHIFT; > -#elif !defined(CONFIG_PPC_FSL_BOOK3E) > - idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd); > -#endif > - > - return dir + idx; > -} > - > void flush_dcache_icache_hugepage(struct page *page); > > int slice_is_hugepage_only_range(struct mm_struct *mm, unsigned long addr, > @@ -101,15 +29,6 @@ static inline int is_hugepage_only_range(struct mm_struct *mm, > > void book3e_hugetlb_preload(struct vm_area_struct *vma, unsigned long ea, > pte_t pte); > -#ifdef CONFIG_PPC_8xx > -static inline void flush_hugetlb_page(struct vm_area_struct *vma, > - unsigned long vmaddr) > -{ > - flush_tlb_page(vma, vmaddr); > -} > -#else > -void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr); > -#endif > > #define __HAVE_ARCH_HUGETLB_FREE_PGD_RANGE > void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, > diff --git a/arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h b/arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h > new file mode 100644 > index 000000000000..209e6a219835 > --- /dev/null > +++ b/arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h > @@ -0,0 +1,32 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef _ASM_POWERPC_NOHASH_32_HUGETLB_8XX_H > +#define _ASM_POWERPC_NOHASH_32_HUGETLB_8XX_H > + > +static inline pte_t *hugepd_page(hugepd_t hpd) > +{ > + if (WARN_ON(!hugepd_ok(hpd))) > + return NULL; > + > + return (pte_t *)__va(hpd_val(hpd) & ~HUGEPD_SHIFT_MASK); > +} > + > +static inline unsigned int hugepd_shift(hugepd_t hpd) > +{ > + return ((hpd_val(hpd) & _PMD_PAGE_MASK) >> 1) + 17; > +} > + > +static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr, > + unsigned int pdshift) > +{ > + unsigned long idx = (addr & ((1UL << pdshift) - 1)) >> PAGE_SHIFT; > + > + return hugepd_page(hpd) + idx; > +} > + > +static inline void flush_hugetlb_page(struct vm_area_struct *vma, > + unsigned long vmaddr) > +{ > + flush_tlb_page(vma, vmaddr); > +} > + > +#endif /* _ASM_POWERPC_NOHASH_32_HUGETLB_8XX_H */ > diff --git a/arch/powerpc/include/asm/nohash/hugetlb-book3e.h b/arch/powerpc/include/asm/nohash/hugetlb-book3e.h > new file mode 100644 > index 000000000000..e94f1cd048ee > --- /dev/null > +++ b/arch/powerpc/include/asm/nohash/hugetlb-book3e.h > @@ -0,0 +1,31 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef _ASM_POWERPC_NOHASH_HUGETLB_BOOK3E_H > +#define _ASM_POWERPC_NOHASH_HUGETLB_BOOK3E_H > + > +static inline pte_t *hugepd_page(hugepd_t hpd) > +{ > + if (WARN_ON(!hugepd_ok(hpd))) > + return NULL; > + > + return (pte_t *)((hpd_val(hpd) & ~HUGEPD_SHIFT_MASK) | PD_HUGE); > +} > + > +static inline unsigned int hugepd_shift(hugepd_t hpd) > +{ > + return hpd_val(hpd) & HUGEPD_SHIFT_MASK; > +} > + > +static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr, > + unsigned int pdshift) > +{ > + /* > + * On FSL BookE, we have multiple higher-level table entries that > + * point to the same hugepte. Just use the first one since they're all > + * identical. So for that case, idx=0. > + */ > + return hugepd_page(hpd); > +} > + > +void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr); > + > +#endif /* _ASM_POWERPC_NOHASH_HUGETLB_BOOK3E_H */ >