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Peter Anvin" , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Joel Fernandes , He Zhe , Linus Torvalds Subject: Re: [RFC][PATCH] tracing/x86: Save CR2 before tracing irqsoff on error_entry Message-ID: <20190321183327.GW5996@hirez.programming.kicks-ass.net> References: <20190320221534.165ab87b@oasis.local.home> <20190321083317.GL6058@hirez.programming.kicks-ass.net> <20190321090241.GL6521@hirez.programming.kicks-ass.net> <20190321104517.GM6521@hirez.programming.kicks-ass.net> <20190321093242.4a948198@gandalf.local.home> <20190321172203.GS5996@hirez.programming.kicks-ass.net> <20190321182745.GU5996@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 21, 2019 at 11:28:50AM -0700, Andy Lutomirski wrote: > On Thu, Mar 21, 2019 at 11:27 AM Peter Zijlstra wrote: > > > > On Thu, Mar 21, 2019 at 11:05:06AM -0700, Andy Lutomirski wrote: > > > > > Ugh. > > > > > > I certainly agree in principle that sticking the CR2 read into the asm > > > is the right solution. But this patch makes the spaghetti even more > > > tangled. Maybe we can rearrange the code a bit so that the entry > > > sequence saves at least one register before calling error_entry, so we > > > can do it the obvious way. > > > > What is the obvious way? Note that with all the Xen/paravirt-me-harder > > bits on, we need to clobber at least RAX to get CR2. > > > > And most of the patch was munging the paravirt bits to make that happen. > > > > Another thing I did notices is that CLAC and CLD are not next to one > > another in these paths. > > The thing I really don't like is all the EBX crud to try to get > everything in to the right order. Ah yes, granted. I hate that part too but didn't see a way around it :/