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[59.120.186.245]) by smtp.gmail.com with ESMTPSA id y26sm7520627pfe.93.2019.03.21.20.37.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Mar 2019 20:37:16 -0700 (PDT) From: "Ji-Ze Hong (Peter Hong)" X-Google-Original-From: "Ji-Ze Hong (Peter Hong)" To: wim@linux-watchdog.orgw, linux@roeck-us.net Cc: linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, "Ji-Ze Hong (Peter Hong)" Subject: [PATCH V1 1/1] watchdog: f71808e_wdt: fix F81866 bit operation Date: Fri, 22 Mar 2019 11:36:56 +0800 Message-Id: <1553225816-24375-1-git-send-email-hpeter+linux_kernel@gmail.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fix error bit operation in watchdog_start() Signed-off-by: Ji-Ze Hong (Peter Hong) --- drivers/watchdog/f71808e_wdt.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c index 9a1c761258ce..9129485732c7 100644 --- a/drivers/watchdog/f71808e_wdt.c +++ b/drivers/watchdog/f71808e_wdt.c @@ -387,18 +387,17 @@ static int watchdog_start(void) case f81866: /* Set pin 70 to WDTRST# */ - superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, - BIT(3) | BIT(0)); - superio_set_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, - BIT(2)); + superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, 3); + superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, 0); + superio_set_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, 2); + /* * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0. * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch: * BIT5: 0 -> WDTRST# * 1 -> GPIO15 */ - superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, - BIT(5)); + superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, 5); break; default: -- 2.7.4