Received: by 2002:ac0:bc90:0:0:0:0:0 with SMTP id a16csp1615479img; Sat, 23 Mar 2019 07:33:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqzeB9JOcnarKCwACBY0weVpkJXO9v1h87UYGJyaXwTectIqG+QlgBIQHHwWj54oxE0wqJhX X-Received: by 2002:a63:c06:: with SMTP id b6mr14338234pgl.440.1553351625244; Sat, 23 Mar 2019 07:33:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553351625; cv=none; d=google.com; s=arc-20160816; b=Sy14kaVQAeb7u3ScXeShhUzHYAjv7P8weQRK/v8KW6YGzbmqxB2+jo5NuylibKbo+G FVNwXt5m6v+lpwAQ+I+sdA1hkOZUTp4snw/67lMVInEKAS10qyDXdDQNQjrP+sqfx9jl dv+K0WNJbb2zUWsdRxVFVqgTV/04ouXM1Vkz5hPqT2LaLTlSEcK0yp5G29ZOE9ZxEkrO pUXtWB7B69SfMIcl64PfOdoPp7wTnq9On62LATfwF8ienlMowmMYNXknhmN14NJUuAw8 Y4+SAEPs6fgv1O30UHhBgtUIh0Qj0LapGQL+ZUM7B3ETdP+7B8vBbfZD1bMgsdXc437q fVfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=py6cpEeA61bl3Lz1V6SjEUVbal4kHP2SXz/6S2yKAtQ=; b=fEtv9cnVrLBoCiSs9wuKSOcwkVFwNX8LOGIn2XA+ho73WStd0cLIdg785yBTNCtR5o M/BmBhwOdtuHAoa8E8cVbQHyPPFP1bSJppD6SfIb11I7YXMA7FfNHZpALUyShhXbOnqn 12OZSPC0nf/abVXsxct6730SUMnUqb+j6FhIg0R+mCKoLDPYaQbiP1uNmpNnqZLM8sMI s6q4sTI/IM1PGvky9YVQbQZFp5NOtdqhuw+Qa/uW4uhVLn6+c4AeTBb5vYHw8WOvvi35 nYzh6emoJ9LpSp99FG0ULS9BaaOpd5UIQHbs2bjeZiFajITAh57R98l0JCZY3GG5Ar+I gBzg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id az1si7792044plb.9.2019.03.23.07.33.30; Sat, 23 Mar 2019 07:33:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727960AbfCWOcH (ORCPT + 99 others); Sat, 23 Mar 2019 10:32:07 -0400 Received: from asrmicro.com ([210.13.118.86]:5715 "EHLO spam.asrmicro.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727906AbfCWOcE (ORCPT ); Sat, 23 Mar 2019 10:32:04 -0400 Received: from spam.asrmicro.com (localhost [127.0.0.2] (may be forged)) by spam.asrmicro.com with ESMTP id x2NE9XMc031604 for ; Sat, 23 Mar 2019 22:09:33 +0800 (GMT-8) (envelope-from qiaozhou@asrmicro.com) Received: from mail2012.asrmicro.com (mail2012.asrmicro.com [10.1.24.123]) by spam.asrmicro.com with ESMTP id x2NE43WY030608; Sat, 23 Mar 2019 22:04:03 +0800 (GMT-8) (envelope-from qiaozhou@asrmicro.com) Received: from localhost (10.1.170.171) by mail2012.asrmicro.com (10.1.24.123) with Microsoft SMTP Server (TLS) id 15.0.847.32; Sat, 23 Mar 2019 22:05:40 +0800 From: qiaozhou To: Catalin Marinas , Will Deacon , , CC: Qiao Zhou Subject: [PATCH] arm64: add support for ASR AquilaC SoC Date: Sat, 23 Mar 2019 22:05:39 +0800 Message-ID: <1553349939-2363-1-git-send-email-qiaozhou@asrmicro.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.1.170.171] X-ClientProxiedBy: mail2012.asrmicro.com (10.1.24.123) To mail2012.asrmicro.com (10.1.24.123) X-DNSRBL: X-MAIL: spam.asrmicro.com x2NE43WY030608 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Qiao Zhou Add ARCH_ASR Signed-off-by: qiaozhou --- arch/arm64/Kconfig.platforms | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 70498a0..da8d43a 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -278,4 +278,10 @@ config ARCH_ZYNQMP help This enables support for Xilinx ZynqMP Family +config ARCH_ASR + bool "ASR Microelectronics chip Family" + select PINCTRL + help + This enables support for ASR Microelectronics chip Family, including: + - ASR 8751C SoC endmenu -- 2.7.4