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Date:   Sat, 23 Mar 2019 16:15:43 -0700
From:   Andi Kleen <ak@linux.intel.com>
To:     Peter Zijlstra <peterz@infradead.org>
Cc:     Like Xu <like.xu@linux.intel.com>, linux-kernel@vger.kernel.org,
        kvm@vger.kernel.org, like.xu@intel.com, wei.w.wang@intel.com,
        Kan Liang <kan.liang@linux.intel.com>,
        Ingo Molnar <mingo@redhat.com>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [RFC] [PATCH v2 0/5] Intel Virtual PMU Optimization
Message-ID: <20190323231543.GE18020@tassilo.jf.intel.com>
References: <1553350688-39627-1-git-send-email-like.xu@linux.intel.com>
 <20190323172800.GD6058@hirez.programming.kicks-ass.net>
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> > We optimize the current vPMU to work in this manner:
> > 
> > (1) rely on the existing host perf (perf_event_create_kernel_counter)
> >     to allocate counters for in-use vPMC and always try to reuse events;
> > (2) vPMU captures guest accesses to the eventsel and fixctrl msr directly
> >     to the hardware msr that the corresponding host event is scheduled on
> >     and avoid pollution from host is also needed in its partial runtime;
> 
> If you do pass-through; how do you deal with event constraints?

The guest has to deal with them. It already needs to know
the model number to program the right events, can as well know
the constraints too.

For architectural events that don't need the model number it's
not a problem because they don't have constraints.

-Andi