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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 25 Mar 2019 06:12:32 -0000 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2P6CV0923068912 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 25 Mar 2019 06:12:32 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DC4E8A4069; Mon, 25 Mar 2019 06:12:31 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0B852A405F; Mon, 25 Mar 2019 06:12:31 +0000 (GMT) Received: from rapoport-lnx (unknown [9.148.207.233]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Mon, 25 Mar 2019 06:12:30 +0000 (GMT) Date: Mon, 25 Mar 2019 08:12:29 +0200 From: Mike Rapoport To: Anup Patel Cc: Palmer Dabbelt , Albert Ou , Atish Patra , Christoph Hellwig , Paul Walmsley , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v2] RISC-V: Always compile mm/init.c with cmodel=medany References: <20190325033648.16171-1-anup.patel@wdc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190325033648.16171-1-anup.patel@wdc.com> User-Agent: Mutt/1.5.24 (2015-08-30) X-TM-AS-GCONF: 00 x-cbid: 19032506-0028-0000-0000-00000357D9DF X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19032506-0029-0000-0000-000024168AEE Message-Id: <20190325061228.GB2925@rapoport-lnx> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-03-25_04:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=903 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903250047 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 25, 2019 at 03:37:38AM +0000, Anup Patel wrote: > The Linux RISC-V 32bit kernel is broken after we moved setup_vm() from > kernel/setup.c to mm/init.c because Linux RISC-V 32bit kernel by default > uses cmodel=medlow which results in a non-position-independent setup_vm(). > > This patch fixes Linux RISC-V 32bit kernel booting by: > 1. Forcing cmodel=medany for mm/init.c > 2. Moving remaing MM-related stuff va_pa_offset, pfn_base and > empty_zero_page from kernel/setup.c to mm/init.c > > Fixes: 6f1e9e946f0b ("RISC-V: Move setup_vm() to mm/init.c") > Suggested-by: Christoph Hellwig > Suggested-by: Mike Rapoport > Signed-off-by: Anup Patel Reviewed-by: Mike Rapoport > --- > v2: Removed CFLAGS_setup.o from kernel/Makefile and replaced SoBs > --- > arch/riscv/kernel/Makefile | 2 -- > arch/riscv/kernel/setup.c | 8 -------- > arch/riscv/mm/Makefile | 2 ++ > arch/riscv/mm/init.c | 9 +++++++++ > 4 files changed, 11 insertions(+), 10 deletions(-) > > diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile > index f13f7f276639..8b9780b6bd7f 100644 > --- a/arch/riscv/kernel/Makefile > +++ b/arch/riscv/kernel/Makefile > @@ -29,8 +29,6 @@ obj-y += vdso.o > obj-y += cacheinfo.o > obj-y += vdso/ > > -CFLAGS_setup.o := -mcmodel=medany > - > obj-$(CONFIG_FPU) += fpu.o > obj-$(CONFIG_SMP) += smpboot.o > obj-$(CONFIG_SMP) += smp.o > diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c > index ecb654f6a79e..540a331d1376 100644 > --- a/arch/riscv/kernel/setup.c > +++ b/arch/riscv/kernel/setup.c > @@ -48,14 +48,6 @@ struct screen_info screen_info = { > }; > #endif > > -unsigned long va_pa_offset; > -EXPORT_SYMBOL(va_pa_offset); > -unsigned long pfn_base; > -EXPORT_SYMBOL(pfn_base); > - > -unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; > -EXPORT_SYMBOL(empty_zero_page); > - > /* The lucky hart to first increment this variable will boot the other cores */ > atomic_t hart_lottery; > unsigned long boot_cpu_hartid; > diff --git a/arch/riscv/mm/Makefile b/arch/riscv/mm/Makefile > index eb22ab49b3e0..7307609d405b 100644 > --- a/arch/riscv/mm/Makefile > +++ b/arch/riscv/mm/Makefile > @@ -3,3 +3,5 @@ obj-y += fault.o > obj-y += extable.o > obj-y += ioremap.o > obj-y += cacheflush.o > + > +CFLAGS_init.o := -mcmodel=medany > diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c > index b379a75ac6a6..7a7c454378cb 100644 > --- a/arch/riscv/mm/init.c > +++ b/arch/riscv/mm/init.c > @@ -25,6 +25,10 @@ > #include > #include > > +unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] > + __page_aligned_bss; > +EXPORT_SYMBOL(empty_zero_page); > + > static void __init zone_sizes_init(void) > { > unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, }; > @@ -143,6 +147,11 @@ void __init setup_bootmem(void) > } > } > > +unsigned long va_pa_offset; > +EXPORT_SYMBOL(va_pa_offset); > +unsigned long pfn_base; > +EXPORT_SYMBOL(pfn_base); > + > pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss; > pgd_t trampoline_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); > > -- > 2.17.1 > -- Sincerely yours, Mike.