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[209.132.180.67]) by mx.google.com with ESMTP id 7si9404982pfh.34.2019.03.25.05.24.16; Mon, 25 Mar 2019 05:24:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731296AbfCYMXQ (ORCPT + 99 others); Mon, 25 Mar 2019 08:23:16 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:20967 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1730938AbfCYMXO (ORCPT ); Mon, 25 Mar 2019 08:23:14 -0400 X-UUID: 2d4a71afe45b4fc2b42a39350bc7eca9-20190325 X-UUID: 2d4a71afe45b4fc2b42a39350bc7eca9-20190325 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1739437294; Mon, 25 Mar 2019 20:23:09 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 25 Mar 2019 20:23:08 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 25 Mar 2019 20:23:06 +0800 From: Zhiyong Tao To: , , , , CC: , , , , , , , , , , , , , Subject: [PATCH v3 0/4] PINCTRL: Mediatek pinctrl patch on mt8183 Date: Mon, 25 Mar 2019 20:22:58 +0800 Message-ID: <20190325122302.5483-1-zhiyong.tao@mediatek.com> X-Mailer: git-send-email 2.12.5 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series includes 4 patches: 1.add pintcrl binding document on mt8183. 2.add pintcrl file on mt8183. 3.add pintcrl device node on mt8183. 4.add drive for I2C related pins on MT8183. Changes in patch v3: 1)add the patch "dt-bindings: pinctrl: mt8183: add binding document". 2)add the patch "arm64: dts: mt8183: add pintcrl file". 3)add the patch "arm64: dts: mt8183: add pintcrl device node". 4)add more datail information for the specific driving setup in commit message. 5)use "mediatek,drive-strength-adv" instead of "mediatek,drive-enable-adv" and "mediatek,drive-enable-disable". 6)change "PINCTRL_PIN_REG_DRV_EN_DIS" to "PINCTRL_PIN_REG_DRV_EN". 7)change the function "mtk_pinconf_adv_drive_set". Changes in patch v2: 1)add the details strength specification of the I2c pins. 2)change "mt8183_pin_drv_en_dis_range" to "mt8183_pin_e1e0en_range". 3)change "mt8183_pin_drv_e0_range" to "mt8183_pin_e0_range". 4)change "mt8183_pin_drv_e1_range" to "mt8183_pin_e1_range". Zhiyong Tao (4): dt-bindings: pinctrl: mt8183: add binding document arm64: dts: mt8183: add pintcrl file arm64: dts: mt8183: add pintcrl device node pinctrl: add drive for I2C related pins on MT8183 .../devicetree/bindings/pinctrl/pinctrl-mt8183.txt | 132 +++ arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt8183.dtsi | 27 +- drivers/pinctrl/mediatek/pinctrl-mt8183.c | 50 + drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 47 + drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h | 11 + drivers/pinctrl/mediatek/pinctrl-paris.c | 12 + 7 files changed, 1398 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h -- 2.12.5