Received: by 2002:ac0:bc90:0:0:0:0:0 with SMTP id a16csp3190702img; Mon, 25 Mar 2019 05:42:56 -0700 (PDT) X-Google-Smtp-Source: APXvYqxFrOk6d7kfvNge9G5zmTwPtsaMlr1qSmgX/Vq2ElbF9ziSnm6P4MfD/8pFLBgNk9e65tpo X-Received: by 2002:a17:902:6a83:: with SMTP id n3mr24863113plk.313.1553517776501; Mon, 25 Mar 2019 05:42:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553517776; cv=none; d=google.com; s=arc-20160816; b=hfczCShGQYqagR3qT/7RUqGLMX3FVzJBemAF92fApXugQ365QFrU/Qai78Ircl9vNS ZJ5UwXUF23erWP4yf0auVs6/owd2szVltW+ePvASuWs0f02xzLtTygsJ+I1O6jwLvRpi 0BoDvgak55GZSwPS16lmeB9fK6z+IpjXDrm7CmCx5vc8NUGOTQFRJpFQbkgFbRRS1Q/4 GlWcN8V3xkEkS7HcZE/dSu4280jsf1AIoK3sVrNg+aNGoHBF/guNYdCOQK7NMrXVMXhG JIxzDrn7zofs+L7k2HZQHb4A0/RYBwywv0NhAjr5EZE7t54qWoplaKrgttlnlyKKegKX z0bQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=q90SZhEaEbnt7QfCQfvnG9NL7vZZ2bzlNfJqU0NA6c0=; b=L4Hj8tJLJfxkG0eD04iFgEFYEvOplBUVtcq9HQQzrVJd9FpLWY2BdJv1M22gUKQB9U i15sQ3E0MuEtKg4HwIEXdMH/A6Q5Li7RtSHAxNpA34B3QNnjxSlOABFFx7uQx1nXsh6Q Np7+L/2ztHWVPLMGCdAR+YGjeZLVCZ6nbM4M29OfR9EIJcUbLKs5x0q+jsx8nOM5dRB8 a6J2jLb+E48xZte0SBfgPUlrXSDtIZUnNOto1LoHFsYjbuHLjsVVupqnAnft7YTi+kol 6b3ui/0aYEO7hOMeGO7u4RtyTzz6b25Eu9OgqwDwJWenRGRNhJKOOimNWIyFndJ12zgM 69pw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w5si13766625plz.23.2019.03.25.05.42.42; Mon, 25 Mar 2019 05:42:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731243AbfCYMl6 (ORCPT + 99 others); Mon, 25 Mar 2019 08:41:58 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:61399 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1731096AbfCYMl4 (ORCPT ); Mon, 25 Mar 2019 08:41:56 -0400 X-UUID: 13c0bfc77b9c4ad081e7542d806cccf5-20190325 X-UUID: 13c0bfc77b9c4ad081e7542d806cccf5-20190325 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 912487030; Mon, 25 Mar 2019 20:41:49 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 25 Mar 2019 20:41:40 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 25 Mar 2019 20:41:39 +0800 From: Zhiyong Tao To: , , , , CC: , , , , , , , , , , , , , Subject: [PATCH v3 RESEND 0/4] PINCTRL: Mediatek pinctrl patch on mt8183 Date: Mon, 25 Mar 2019 20:41:33 +0800 Message-ID: <20190325124137.6117-1-zhiyong.tao@mediatek.com> X-Mailer: git-send-email 2.12.5 MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: 315498D66F836E635214DB8D139430440DF7A464694D865B66E2D9BD454BCD972000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series includes 4 patches: 1.add pintcrl binding document on mt8183. 2.add pintcrl file on mt8183. 3.add pintcrl device node on mt8183. 4.add drive for I2C related pins on MT8183. Changes in patch v3: 1)add the patch "dt-bindings: pinctrl: mt8183: add binding document". 2)add the patch "arm64: dts: mt8183: add pintcrl file". 3)add the patch "arm64: dts: mt8183: add pintcrl device node". 4)add more datail information for the specific driving setup in commit message. 5)use "mediatek,drive-strength-adv" instead of "mediatek,drive-enable-adv" and "mediatek,drive-enable-disable". 6)change "PINCTRL_PIN_REG_DRV_EN_DIS" to "PINCTRL_PIN_REG_DRV_EN". 7)change the function "mtk_pinconf_adv_drive_set". Changes in patch v2: 1)add the details strength specification of the I2c pins. 2)change "mt8183_pin_drv_en_dis_range" to "mt8183_pin_e1e0en_range". 3)change "mt8183_pin_drv_e0_range" to "mt8183_pin_e0_range". 4)change "mt8183_pin_drv_e1_range" to "mt8183_pin_e1_range". Zhiyong Tao (4): dt-bindings: pinctrl: mt8183: add binding document arm64: dts: mt8183: add pintcrl file arm64: dts: mt8183: add pintcrl device node pinctrl: add drive for I2C related pins on MT8183 .../devicetree/bindings/pinctrl/pinctrl-mt8183.txt | 132 +++ arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h | 1120 ++++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt8183.dtsi | 27 +- drivers/pinctrl/mediatek/pinctrl-mt8183.c | 50 + drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 47 + drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h | 11 + drivers/pinctrl/mediatek/pinctrl-paris.c | 12 + 7 files changed, 1398 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8183.txt create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pinfunc.h -- 2.12.5