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From:   Andy Lutomirski <luto@kernel.org>
Date:   Mon, 25 Mar 2019 17:43:54 -0700
Message-ID: <CALCETrW2zvANR7P+JW3C5zVwHEH=J4xwgZQi5M9-rccP-dqPXg@mail.gmail.com>
Subject: Re: [RESEND PATCH v6 00/12] x86: Enable FSGSBASE instructions
To:     "Chang S. Bae" <chang.seok.bae@intel.com>
Cc:     Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@kernel.org>,
        Andy Lutomirski <luto@kernel.org>,
        "H . Peter Anvin" <hpa@zytor.com>, Andi Kleen <ak@linux.intel.com>,
        Ravi Shankar <ravi.v.shankar@intel.com>,
        LKML <linux-kernel@vger.kernel.org>
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On Fri, Mar 15, 2019 at 1:07 PM Chang S. Bae <chang.seok.bae@intel.com> wrote:
>
> Updates from v5 [5]:
> * Drop the new tain flag (TAINT_INSECURE)
> * Cleanup copy_thread_tls(), some changelog, and unnecessary comments on
>   assembly macros
> * Rearrange some helper updates appropriately (from patch 4 to 6)

I think this stuff is in generally decent shape, but I have two big
broad comments:

What's the status of the stuff hpa was working on to make the behavior
of modify_ldt() predictable?

Can we please have a test case that explicitly exercises the way that
ptrace reads and writes the base registers?