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[209.132.180.67]) by mx.google.com with ESMTP id i1si13819876pgb.322.2019.03.27.02.52.48; Wed, 27 Mar 2019 02:53:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=KBiu3Qda; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732800AbfC0JwB (ORCPT + 99 others); Wed, 27 Mar 2019 05:52:01 -0400 Received: from mail-ed1-f65.google.com ([209.85.208.65]:35800 "EHLO mail-ed1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725768AbfC0Jv7 (ORCPT ); Wed, 27 Mar 2019 05:51:59 -0400 Received: by mail-ed1-f65.google.com with SMTP id s39so7907625edb.2; Wed, 27 Mar 2019 02:51:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=/5AIoA6ChhwDIegaA+cCOSrOTfzvCLOmDA5uUa6xubw=; b=KBiu3QdalWk+uy2S35xmGZmzR7JkdTt9uB+noCYRIudp6H4Tbobaya+SAq2y57+bue RXET1QkI5YifAHNdOUbIznEQgxDfDvSqRc5cwAjDhFeGepsLiI9DehzRdqnDKPIIj+ba Sa01n2SpNgi2/5BRKFJMmeeO4M6L2odH7GpLPWejxC+5LjUcTtnAfGNqqDK3TTypJzm5 A+7g9DcWOhnszQ7QXJ70LIMkyHfF6pBOc89Nyve6MefzoRhWZBMY8f3L/UoYnH5SOAiS z4M49J7WcJxOjA8hiTx6C0xFA4ebO85MfbLnaJqt2yZFLdKSPT6osalW3nJjCU2BslO2 CGSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=/5AIoA6ChhwDIegaA+cCOSrOTfzvCLOmDA5uUa6xubw=; b=kHKR+RWxF6rM7njetMnMQawZ/7qyVFsoQV7fue7NQuTb1SXozyKRMJJ3N5qjGQiHNM eciGnwEpjGrj4WzPaKxnN8IlBCnI6FufyG/Fjr7CZippUmUz/wPJdbFNwbQH7cb8SKqZ VoSRCMV9u4Ae7KWS4kVyVh449WvLQrscokpn3XzGBD4z/ZzuwvcSoMs80m2p+qfwL2Z1 G8OGeB50N2xuPPexywNw1MlueW4fNXbe8kV7gypke2bqp9yQdoa++FZqcTuyZenhbtyw q2PgvPe/QSpp2DVt7EXbz39NBg4O/Ujlu1jRyzMXVrMXSh8vSpV9d6Ah5cLHpgU0RXBQ 7cdA== X-Gm-Message-State: APjAAAUpVHcpXUMPIYAY8nsh4q5DXUXGcLrK/FF2ath4kt83Mvo4Zq7z Wgw5PM6pZFePGQUeOk3yquNTOPF7IOMnIu3mrIs= X-Received: by 2002:a50:aa2e:: with SMTP id o43mr23262618edc.67.1553680317412; Wed, 27 Mar 2019 02:51:57 -0700 (PDT) MIME-Version: 1.0 References: <20190308120141.3698-1-daniel.baluta@nxp.com> <20190308120141.3698-2-daniel.baluta@nxp.com> <20190319143139.GA24315@dragon> In-Reply-To: From: Daniel Baluta Date: Wed, 27 Mar 2019 11:51:45 +0200 Message-ID: Subject: Re: [PATCH v6 1/4] arm64: dts: imx8mq: Add SDMA nodes To: Angus Ainslie Cc: Shawn Guo , Daniel Baluta , Mark Rutland , Devicetree List , baruch@tkos.co.il, Anson Huang , Abel Vesa , Kuninori Morimoto , ccaione@baylibre.com, Chris Spencer , "S.j. Wang" , Linux Kernel Mailing List , Rob Herring , dl-linux-imx , Pengutronix Kernel Team , Aisheng Dong , agx@sigxcpu.org, Fabio Estevam , Sascha Hauer , linux-arm-kernel , Lucas Stach Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 26, 2019 at 11:44 PM Angus Ainslie wrote: > > On 2019-03-19 07:31, Shawn Guo wrote: > > On Fri, Mar 08, 2019 at 12:02:22PM +0000, Daniel Baluta wrote: > >> SDMA1 is part of AIPS-3 region and SDMA2 is part > >> of AIPS-1 region. > >> > >> Reviewed-by: Fabio Estevam > > > > Reviewed-by tag should go after your SoB, since that's the sequence of > > how they come. > > > >> Signed-off-by: Anson Huang > >> [initial submit in i.MX internal tree] > >> Signed-off-by: Daniel Baluta > >> [adaptation for linux-next] > > > > I would see these notes in commit log or even just cover letter. > > > > Shawn > > > >> --- > >> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++++ > >> 1 file changed, 22 insertions(+) > >> > >> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > >> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > >> index 9155bd4784eb..9d48450453fb 100644 > >> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > >> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > >> @@ -234,6 +234,17 @@ > >> status = "disabled"; > >> }; > >> > >> + sdma2: sdma@302c0000 { > >> + compatible = "fsl,imx8mq-sdma","fsl,imx7d-sdma"; > >> + reg = <0x302c0000 0x10000>; > >> + interrupts = ; > >> + clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>, > >> + <&clk IMX8MQ_CLK_SDMA2_ROOT>; > >> + clock-names = "ipg", "ahb"; > >> + #dma-cells = <3>; > >> + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; > >> + }; > >> + > >> iomuxc: iomuxc@30330000 { > >> compatible = "fsl,imx8mq-iomuxc"; > >> reg = <0x30330000 0x10000>; > >> @@ -575,6 +586,17 @@ > >> status = "disabled"; > >> }; > >> > >> + sdma1: sdma@30bd0000 { > >> + compatible = "fsl, imx8mq-sdma","fsl,imx7d-sdma"; > > There shouldn't be a space in the imx8mq compatible string. Oh, nice catch. This patch series is already in so care to send a fix? Otherwise, I will take care of it. thanks, Daniel.